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參數(shù)資料
| 型號： | M38259EFFS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, UVPROM, 4 MHz, MICROCONTROLLER, CQCC100 |
| 封裝： | CERAMIC, LCC-100 |
| 文件頁數(shù)： | 31/73頁 |
| 文件大?。?/td> | 1323K |
| 代理商： | M38259EFFS |
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Rev.2.02
Jun 19, 2007
page 35 of 73
REJ03B0146-0202
3823 Group
(3) Synchronous/Asynchronous Alternate
Transmit Mode
Synchronous/asynchronous alternate transmit mode is selected
by setting the transmit enable bit in the serial I/O control register to
“1” after setting the synchronous serial I/O output pin selection bit
in the peripheral function expansion register to “1”. Set the syn-
chronous serial I/O output pin selection bit to “1” when the serial I/
O mode selection bit is set to “0”. In this mode, transmit cannot be
performed continuously. Write to the transmit buffer register after
Fig. 30 Block diagram of synchronous/asynchronous alternate transmit
Fig. 31 Operation of synchronous/asynchronous alternate transmit function
confirming that the transmit shift register is set to “1”, and then
______
changing the serial I/O mode selection bit. The SRDY output func-
tion cannot be used when the clock synchronous serial I/O is
selected. Also, when using the internal clock for the transfer clock
(the serial I/O synchronous clock selection bit is set to “0”), apply
“H” output to the P46 pin. The other operation is the same as clock
synchronous serial I/O mode and asynchronous serial I/O mode
(UART).
1/4
Serial I/O status register
P45/TXD
Note: f(SUB) is the source oscillation frequency in low-speed mode. f(SUB) shows the oscillation frequency of XCIN or the on-chip oscillator.
Baud rate generator
Frequency division
ratio 1/(n+1)
Clock control circuit
Transmit buffer register
Date bus
Transmit shift register
Address 001816
Transmit shift register shift
completion flag (TSC)
Transmit buffer empty flag (TBE)
Transmit interrupt request (TI)
Address 001916
BRG count source
selection bit
Serial I/O synchronous
clock selection bit
P46/SCLK
P47/SRDY/SOUT
f(XIN)
f(SUB) in low-speed mode
(Synchronous output)
(Asynchronous output)
Serial I/O mode
selection bit (SIOM)
Shift clock
(Note)
TSC=0
TBE=1
TSC=1
ST
D1
ST
SP
D1
D7
TSC=1
SP
D1
D7
D0
TBE=0TBE=0
TBE=0
D1
D6
D7
TBE=1
TSC=0
TBE=1
TSC=0
D0
TBE=1
TSC=0
P46/SCLK
P45/TXD
P47/SOUT
(synchronous output)
(Asynchronous output)
synchronous serial I/O
output selection bit
Transmit buffer
write signal
Serial I/O mode
selection bit
Asynchronous transmit
Synchronous transmit
Synchronous
transmit
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