參數(shù)資料
型號: M38503M2A-XXXFP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 6.25 MHz, MICROCONTROLLER, PDSO42
封裝: 8.40 X 17.50 MM, 0.80 MM PITCH, PLASTIC, SSOP-42
文件頁數(shù): 13/59頁
文件大?。?/td> 885K
代理商: M38503M2A-XXXFP
Rev.2.13
Apr 17, 2009
Page 20 of 56
REJ03B0125-0213
3850 Group (Spec.A QzROM version)
NOTES:
1. Vector addresses contain interrupt jump destination addresses.
2. Reset function in the same way as an interrupt with the highest priority.
Table 8
Interrupt vector addresses and priority
Interrupt Source
Priority
Vector
Addresses(1)
Interrupt Request Generating
Conditions
Remarks
High
Low
Reset(2)
1FFFD16
FFFC16
At reset
Non-maskable
INT0
2FFFB16
FFFA16
At detection of either rising or falling
edge of INT0 input
External interrupt
(active edge selectable)
Reserved
3
FFF916
FFF816
Reserved
INT1
4
FFF716
FFF616
At detection of either rising or falling
edge of INT1 input
External interrupt
(active edge selectable)
INT2
5
FFF516
FFF416
At detection of either rising or falling
edge of INT2 input
External interrupt
(active edge selectable)
INT3/Serial I/O2
6
FFF316
FFF216
At detection of either rising or falling
edge of INT3 input/ At completion of
serial I/O2 data reception/transmission
External interrupt
(active edge selectable)
Switch by Serial I/O2/INT3 interrupt
source bit
Reserved
7
FFF116
FFF016
Reserved
Timer X
8
FFEF16
FFEE16
At timer X underflow
Timer Y
9
FFED16
FFEC16
At timer Y underflow
Timer 1
10
FFEB16
FFEA16
At timer 1 underflow
STP release timer underflow
Timer 2
11
FFE916
FFE816
At timer 2 underflow
Serial I/O1 reception
12
FFE716
FFE616
At completion of serial I/O1 data
reception
Valid when serial I/O1 is selected
Serial I/O1
Transmission
13
FFE516
FFE416
At completion of serial I/O1 transfer
shift or when transmission buffer is
empty
Valid when serial I/O1 is selected
CNTR0
14
FFE316
FFE216
At detection of either rising or falling
edge of CNTR0 input
External interrupt
(active edge selectable)
CNTR1
15
FFE116
FFE016
At detection of either rising or falling
edge of CNTR1 input
External interrupt
(active edge selectable)
A/D converter
16
FFDF16
FFDE16
At completion of A/D conversion
BRK instruction
17
FFDD16
FFDC16 At BRK instruction execution
Non-maskable software interrupt
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