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參數(shù)資料
| 型號(hào)： | M38503M2A-XXXFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 6.25 MHz, MICROCONTROLLER, PDSO42 |
| 封裝： | 8.40 X 17.50 MM, 0.80 MM PITCH, PLASTIC, SSOP-42 |
| 文件頁數(shù)： | 47/59頁 |
| 文件大?。?/td> | 885K |
| 代理商： | M38503M2A-XXXFP |
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Rev.2.13
Apr 17, 2009
Page 51 of 56
REJ03B0125-0213
3850 Group (Spec.A QzROM version)
APPENDIX
NOTES ON PROGRAMMING
1. Processor Status Register
(1) Initializing of processor status register
Flags which affect program execution must be initialized after a
reset.
In particular, it is essential to initialize the T and D flags because
they have an important effect on calculations.
<Reason>
After a reset, the contents of the processor status register (PS) are
undefined except for the I flag which is “1”.
Fig 49. Initialization of processor status register
(2) How to reference the processor status register
To reference the contents of the processor status register (PS),
execute the PHP instruction once then read the contents of (S+1).
If necessary, execute the PLP instruction to return the PS to its
original status.
Fig 50. Stack memory contents after PHP instruction execution
2. BRK instruction
(1) Interrupt priority level
When the BRK instruction is executed with the following
conditions satisfied, the interrupt execution is started from the
address of interrupt vector which has the highest priority.
Interrupt request bit and interrupt enable bit are set to “1”.
Interrupt disable flag (I) is set to “1” to disable interrupt.
3. Decimal calculations
(1) Execution of decimal calculations
The ADC and SBC are the only instructions which will yield
proper decimal notation, set the decimal mode flag (D) to “1”
with the SED instruction. After executing the ADC or SBC
instruction, execute another instruction before executing the
SEC, CLC, or CLD instruction.
(2) Notes on status flag in decimal mode
When decimal mode is selected, the values of three of the flags in
the status register (the N, V, and Z flags) are invalid after a ADC
or SBC instruction is executed.
The carry flag (C) is set to “1” if a carry is generated as a result of the
calculation, or is cleared to “0” if a borrow is generated. To
determine whether a calculation has generated a carry, the C flag
must be initialized to “0” before each calculation. To check for a
borrow, the C flag must be initialized to “1” before each calculation.
Fig 51. Execution of decimal calculations
4. JMP instruction
When using the JMP instruction in indirect addressing mode, do
not specify the last address on a page as an indirect address.
5. Multiplication and Division Instructions
The index X mode (T) and the decimal mode (D) flags do not
affect the MUL and DIV instruction.
The execution of these instructions does not change the
contents of the processor status register.
6. Ports
The contents of the port direction registers cannot be read. The
following cannot be used:
The data transfer instruction (LDA, etc.)
The operation instruction when the index X mode flag (T) is “1”
The addressing mode which uses the value of a direction
register as an index
The bit-test instruction (BBC or BBS, etc.) to a direction register
The read-modify-write instructions (ROR, CLB, or SEB, etc.)
to a direction register.
Use instructions such as LDM and STA, etc., to set the port
direction registers.
7. Instruction Execution Time
The instruction execution time can be obtained by multiplying
the frequency of the internal clock
φ by the number of cycles
mentioned in the 740 Family Software Manual.
The frequency of the internal clock
φ is the twice the XIN cycle in
high-speed mode, 8 times the XIN cycle in middle-speed mode,
and the twice the XCIN in low-speed mode.
8. Reserved Area, Reserved Bit
Do not write any data to the reserved area in the SFR area and the
special page. (Do not change the contents after reset.)
9. CPU Mode Register
Be sure to fix bit 3 of the CPU mode register (address 003B16) to
“1”.
Reset
Initializing of flags
Main program
Stored PS
(S)
(S) + 1
Set D flag to “1”
ADC or SBC instruction
NOP instruction
SEC, CLC, or CLD instruction
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