
Rev.1.10
Apr 3, 2006
page 75 of 75
REJ03B0139-0110
3858 Group
Handling of Source Pins
In order to avoid a latch-up occurrence, connect a capacitor suit-
able for high frequencies as bypass capacitor between power
source pin (VCC pin) and GND pin (VSS pin) and between power
source pin (VCC pin) and analog power source input pin (AVSS
pin). Besides, connect the capacitor to as close as possible. For
bypass capacitor which should not be located too far from the pins
to be connected, a ceramic capacitor of 0.01
F–0.1 F is recom-
mended.
Power Source Voltage
When the power source voltage value of a microcomputer is less
than the value which is indicated as the recommended operating
conditions, the microcomputer does not operate normally and may
perform unstable operation.
In a system where the power source voltage drops slowly when
the power source voltage drops or the power supply is turned off,
reset a microcomputer when the power source voltage is less than
the recommended operating conditions and design a system not
to cause errors to the system by this unstable operation.
Product Shipped in Blank
As for the product shipped in blank, Renesas does not perform the
writing test to user ROM area after the assembly process though
the QzROM writing test is performed enough before the assembly
process. Therefore, a writing error of approx.0.1 % may occur.
Moreover, please note the contact of cables and foreign bodies on
a socket, etc. because a writing environment may cause some
writing errors.
QzROM Version
Connect the CNVSS/VPP pin the shortest possible to the GND pat-
tern which is supplied to the VSS pin of the microcomputer.
In addition connecting an approximately 5 k
resistor in series to
the GND could improve noise immunity. In this case as well as the
above mention, connect the pin the shortest possible to the GND
pattern which is supplied to the VSS pin of the microcomputer.
<Reason>
The CNVSS/VPP pin is the power source input pin for the built-in
QzROM. When programming in the QzROM, the impedance of the
VPP pin is low to allow the electric current for writing to flow into
the built-in QzROM. Because of this, noise can enter easily. If
noise enters the VPP pin, abnormal instruction codes or data are
read from the QzROM, which may cause a program runaway.
CNVSS/(VPP)
VSS
The shortest
Approx. 5k
(Note)
Note. Shows the microcomputer's pin.
Fig 68.
Wiring for the CNVSS/VPP
Notes On QzROM Writing Orders
When ordering the QzROM product shipped after writing, submit
the mask file (extension: .mask) which is made by the mask file
converter MM.
Be sure to set the ROM option (“MASK option” written in the mask
file converter) setup when making the mask file by using the mask
file converter MM.
Notes On ROM Code Protect
(QzROM product shipped after writing)
As for the QzROM product shipped after writing, the ROM code
protect is specified according to the ROM option setup data in the
mask file which is submitted at ordering.
Renesas Technology corp. uses the ROM option setup data at the
ROM code protect address (address FFDB16) when writing to the
QzROM. Consequently, the actual written value might differ from
the ordered value as the contents of the ROM code protect
address.
The ROM option setup data in the mask file is “0016” for protect
enabled or “FF16” for protect disabled. Therefore, the contents of
the ROM code protect address of the QzROM product shipped af-
ter writing is “0016” or “FF16”.
Note that the mask file which has nothing at the ROM option data
or has the data other than “0016” and “FF16” can not be accepted.
DATA REQUIRED FOR QzROM WRITING
ORDERS
The following are necessary when ordering a QzROM product
shipped after writing:
1. QzROM Writing Confirmation Form*
2. Mark Specification Form*
3. ROM data...........Mask file
* For the QzROM writing confirmation form and the mark specifi-
cation form, refer to the “Renesas Technology Corp.”
Homepage (http://www.renesas.com/homepage.jsp).
Note that we cannot deal with special font marking (customer's
trademark etc.) in QzROM microcomputer.