參數(shù)資料
型號(hào): M38869FFAGP
廠商: Mitsubishi Electric Corporation
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述: 單芯片8位CMOS微機(jī)
文件頁(yè)數(shù): 69/110頁(yè)
文件大小: 1601K
代理商: M38869FFAGP
69
3886 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
G
Program command
The microcomputer enters the program mode by inputting com-
mand code “40
16
” in the first cycle. The command code is latched
into the internal command latch at the rising edge of the WE input.
When the address which indicates a program location and data is
input in the second cycle, the M38869FFAHP/GP internally
latches the address at the falling edge of the WE input and the
data at the rising edge of the WE input. The M38869FFAHP/GP
starts programming at the rising edge of the WE input in the sec-
ond cycle and finishes programming within 10
μ
s as measured by
its internal timer. Programming is performed in units of bytes.
Note:
A programming operation is not completed by executing the
program command once. Always be sure to execute a pro-
gram verify command after executing the program command.
When the failure is found in this verification, the user must re-
peatedly execute the program command until the pass. Refer
to Figure 71 for the programming flowchart.
G
Program verify command
The microcomputer enters the program verify mode by inputting
command code “C0
16
” in the first cycle. This command is used to
verify the programmed data after executing the program com-
mand. The command code is latched into the internal command
latch at the rising edge of the WE input. When control signals are
input in the second cycle at the timing shown in Figure 69, the
M38869FFAHP/GP outputs the programmed address’s contents to
the external. Since the address is internally latched when the pro-
gram command is executed, there is no need to input it in the
second cycle.
Fig. 69 Input/output timings during programming (Verify data is output at the same timing as for read.)
Address
Program
Program verify
Program
address
t
WC
t
CS
t
RRW
t
WP
t
WPH
t
WP
t
DP
t
DS
40
16
D
IN
C0
16
Dout
t
DS
t
DH
t
DH
Verify data output
t
DH
t
VSC
t
DS
t
WP
t
WRR
t
CS
t
CS
t
CH
t
CH
t
CH
t
AS
t
AH
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
PP
H
V
PP
L
CE
OE
WE
Data
V
PP
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