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參數(shù)資料
| 型號(hào)： | M48Z2M1YPL |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 122 x 32 pixel format, Compact LCD size |
| 中文描述： | 16兆的2Mb × 8 ZEROPOWER的SRAM |
| 文件頁數(shù)： | 4/12頁 |
| 文件大?。?/td> | 102K |
| 代理商： | M48Z2M1YPL |
Symbol
Parameter
Test Condition
Min
Max
Unit
C
IN
C
IO (3)
Input Capacitance
V
IN
= 0V
40
pF
Input / Output Capacitance
V
OUT
= 0V
40
pF
Notes:
1. Effective capacitance measured with power supply at 5V.
2. Sampled only, not 100% tested.
3. Outputs deselected
Table 5. Capacitance
(1, 2)
(T
A
= 25
°
C, f = 1 MHz )
Symbol
Parameter
Test Condition
Min
Max
Unit
I
LI
(1)
Input Leakage Current
0V
≤
V
IN
≤
V
CC
±
4
μ
A
I
LO
(1)
Output Leakage Current
0V
≤
V
OUT
≤
V
CC
±
4
μ
A
I
CC
Supply Current
E = V
IL
, Outputs open
140
mA
I
CC1
Supply Current (Standby) TTL
E = V
IH
10
mA
I
CC2
Supply Current (Standby) CMOS
E
≥
V
CC
– 0.2V
8
mA
V
IL
Input Low Voltage
–0.3
0.8
V
V
IH
Input High Voltage
2.2
V
CC
+ 0.3
V
V
OL
Output Low Voltage
I
OL
= 2.1mA
0.4
V
V
OH
Output High Voltage
I
OH
= –1mA
2.4
V
Note:
1. Outputs deselected.
Table 6. DC Characteristics
(T
A
= 0 to 70
°
C; V
CC
= 4.75V to 5.5V or 4.5V to 5.5V)
Symbol
Parameter
Min
Typ
Max
Unit
V
PFD
Power-fail Deselect Voltage (M48Z2M1)
4.5
4.6
4.75
V
V
PFD
Power-fail Deselect Voltage (M48Z2M1Y)
4.2
4.3
4.5
V
V
SO
Battery Back-up Switchover Voltage
3
V
t
DR(2)
Data Retention Time
10
YEARS
Notes:
1. All voltages referenced to V
SS
.
2. At 25
°
C
Table 7. Power Down/Up Trip Points DC Characteristics
(1)
(T
A
= 0 to 70
°
C)
4/12
M48Z2M1, M48Z2M1Y
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