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參數(shù)資料
| 型號(hào)： | M48Z2M1YPL |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 122 x 32 pixel format, Compact LCD size |
| 中文描述： | 16兆的2Mb × 8 ZEROPOWER的SRAM |
| 文件頁(yè)數(shù)： | 5/12頁(yè) |
| 文件大小： | 102K |
| 代理商： | M48Z2M1YPL |
Symbol
Parameter
Min
Max
Unit
t
F (1)
V
PFD
(max) to V
PFD
(min) V
CC
Fall Time
300
μ
s
t
FB (2)
V
PFD
(min) to V
SO
V
CC
Fall Time
10
μ
s
t
WP
Write Protect Time from V
CC
= V
PFD
40
150
μ
s
t
R
V
SO
to V
PFD
(max) V
CC
Rise Time
0
μ
s
t
ER
E Recovery Time
40
120
ms
Notes
: 1. V
PFD
(max) to V
PFD
(min) fall time of less than t
F
may result in deselection/write protection not occurring until 200
μ
s after
V
CC
passes V
PFD
(min).
2. V
PFD
(min) to V
SO
fall time of less than t
FB
may cause corruption of RAM data.
Table 8. Power Down/Up Mode AC Characteristics
(T
A
= 0 to 70
°
C)
AI01031
VCC
VPFD (max)
E
(PER CONTROL INPUT)
OUTPUTS
DON'T CARE
HIGH-Z
tF
tFB
tR
tWP
tDR
VALID
VALID
(PER CONTROL INPUT)
RECOGNIZED
RECOGNIZED
VPFD (min)
VSO
tER
Figure 5. Power Down/Up Mode AC Waveforms
5/12
M48Z2M1, M48Z2M1Y
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