參數(shù)資料
型號: M4A3-192/96-6VNC
廠商: Lattice Semiconductor Corporation
文件頁數(shù): 26/62頁
文件大?。?/td> 0K
描述: IC CPLD ISP 4A 192MC 144TQFP
標(biāo)準(zhǔn)包裝: 60
系列: ispMACH® 4A
可編程類型: 系統(tǒng)內(nèi)可編程
最大延遲時間 tpd(1): 6.0ns
電壓電源 - 內(nèi)部: 3 V ~ 3.6 V
宏單元數(shù): 192
輸入/輸出數(shù): 96
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 144-LQFP
供應(yīng)商設(shè)備封裝: 144-TQFP(20x20)
包裝: 托盤
32
ispMACH 4A Family
BLOCK DIAGRAM – M4A(3,5)-256/128
Central
Switch
Matrix
Block B
I/O8–I/O15
CLK0–CLK3
I/O48–I/O55
Block G
I/O72–I/O79
Block J
I/O64–I/O71
Block I
I0–I13
I/O56–I/O63
Block H
Block A
I/O0–I/O7
Block O
I/O112–I/O119
Block P
I/O120–I/O127
Block C I/O16–I/O23
Block D I/O24–I/O31
Block E I/O32–I/O39
Block F I/O40–I/O47
I/O104–I/O111 Block N
I/O96–I/O103 Block M
I/O88–I/O95 Block L
I/O80–I/O87 Block K
I/O Cells
Macrocells
68 X 90
AND Logic Array
and Logic Allocator
Clock
Generator
Input
Switch
Matrix
Output Switch
Matrix
I/O Cells
Macrocells
68 X 90
AND Logic Array
and Logic Allocator
Clock
Generator
Input
Switch
Matrix
Output Switch
Matrix
I/O Cells
Macrocells
68 X 90
AND Logic Array
and Logic Allocator
Clock
Generator
Input
Switch
Matrix
Output Switch
Matrix
I/O Cells
Macrocells
68 X 90
AND Logic Array
and Logic Allocator
Clock
Generator
Input
Switch
Matrix
Output Switch
Matrix
I/O Cells
Macrocells
68 X 90
AND Logic Array
and Logic Allocator
Clock
Generator
Input
Switch
Matrix
Output Switch
Matrix
I/O Cells
Macrocells
68 X 90
AND Logic Array
and Logic Allocator
Clock
Generator
Input
Switch
Matrix
Output Switch
Matrix
I/O Cells
Macrocells
68 X 90
AND Logic Array
and Logic Allocator
Clock
Generator
Input
Switch
Matrix
Output Switch
Matrix
I/O Cells
Macrocells
68 X 90
AND Logic Array
and Logic Allocator
Clock
Generator
Input
Switch
Matrix
Output Switch
Matrix
I/O Cells
Macrocells
68 X 90
AND Logic Array
and Logic Allocator
Clock
Generator
Input
Switch
Matrix
Output Switch
Matrix
I/O Cells
Macrocells
68 X 90
AND Logic Array
and Logic Allocator
Clock
Generator
Input
Switch
Matrix
Output Switch
Matrix
I/O Cells
Macrocells
68 X 90
AND Logic Array
and Logic Allocator
Clock
Generator
Input
Switch
Matrix
Output Switch
Matrix
I/O Cells
Macrocells
68 X 90
AND Logic Array
and Logic Allocator
Clock
Generator
Input
Switch
Matrix
Output Switch
Matrix
I/O Cells
Macrocells
68 X 90
AND Logic Array
and Logic Allocator
Clock
Generator
Input
Switch
Matrix
Output Switch
Matrix
I/O Cells
Macrocells
68 X 90
AND Logic Array
and Logic Allocator
Clock
Generator
Input
Switch
Matrix
Output Switch
Matrix
I/O Cells
Macrocells
68 X 90
AND Logic Array
and Logic Allocator
Clock
Generator
Input
Switch
Matrix
Output Switch
Matrix
I/O Cells
Macrocells
68 X 90
AND Logic Array
and Logic Allocator
Clock
Generator
Input
Switch
Matrix
Output Switch
Matrix
14
4
OE
8
16
8
4
16
24
8
16
34
4
8
24
34
4
8
16
4
16
OE
8
24
34
4
8
16
4
16
OE
4
8
34
24
16
8
16
8
4
16
OE
4
34
24
16
8
16
4
8
OE
4
34
24
16
8
16
4
8
4
8
34
24
16
8
16
8
4
16
OE
8
16
8
4
16
24
8
16
34
4
OE
8
16
8
4
16
24
8
16
34
4
8
24
34
4
8
16
4
16
OE
8
24
34
4
8
16
4
16
OE
4
8
34
24
16
8
16
8
4
16
OE
4
34
24
16
8
16
4
8
OE
4
34
24
16
8
16
4
8
4
8
34
24
16
8
16
8
4
16
OE
8
16
8
4
16
24
8
16
34
4
OE
17466G-024
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