參數(shù)資料
型號: M4A3-96/48-55VC
廠商: Lattice Semiconductor Corporation
文件頁數(shù): 24/62頁
文件大?。?/td> 0K
描述: IC CPLD ISP 4A 96MC 100TQFP
標(biāo)準(zhǔn)包裝: 90
系列: ispMACH® 4A
可編程類型: 系統(tǒng)內(nèi)可編程
最大延遲時間 tpd(1): 5.5ns
電壓電源 - 內(nèi)部: 3 V ~ 3.6 V
宏單元數(shù): 96
輸入/輸出數(shù): 48
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 100-LQFP
供應(yīng)商設(shè)備封裝: 100-TQFP(14x14)
包裝: 托盤
ispMACH 4A Family
30
BLOCK DIAGRAM – M4A(3,5)-128/64
Central
Switch
Matrix
4
2
CLK0/I0, CLK1/I1,
CLK2/I3, CLK3/I4
I2, I5
I/O0–I/O7
I/O8–I/O15
I/O16–I/O23
I/O24–I/031
I/O32–I/O39
I/O40–I/O47
I/O48–I/O55
I/O56–I/O63
I/O
Cells
Output
Switch
Matrix
Macrocells
66
X
90
AND
Logic
Array
and
Logic
Allocator
Clock Generator
16
24
16
8
33
4
8
I/O
Cells
Output
Switch
Matrix
Macrocells
66
X
90
AND
Logic
Array
and
Logic
Allocator
Clock Generator
Input Switch
Matrix
16
24
16
8
33
4
8
I/O
Cells
Output
Switch
Matrix
Macrocells
66
X
90
AND
Logic
Array
and
Logic
Allocator
Clock Generator
Input Switch
Matrix
16
24
16
8
33
4
8
I/O
Cells
Output
Switch
Matrix
Macrocells
66
X
90
AND
Logic
Array
and
Logic
Allocator
Clock Generator
Input Switch
Matrix
16
24
16
8
33
4
8
I/O
Cells
Output
Switch
Matrix
Macrocells
66
X
90
AND
Logic
Array
and
Logic
Allocator
16
24
16
8
33
4
8
I/O
Cells
Output
Switch
Matrix
Macrocells
66
X
90
AND
Logic
Array
and
Logic
Allocator
16
24
16
8
33
4
8
I/O
Cells
Output
Switch
Matrix
Macrocells
66
X
90
AND
Logic
Array
and
Logic
Allocator
16
24
16
8
33
4
8
I/O
Cells
Output
Switch
Matrix
Macrocells
66
X
90
AND
Logic
Array
and
Logic
Allocator
OE
16
24
16
8
33
4
8
Input Switch
Matrix
Input Switch
Matrix
Input Switch
Matrix
Clock Generator
Input Switch
Matrix
Input Switch
Matrix
Clock Generator
OE
Block
A
Block
B
Block
C
Block
D
Block
H
Block
G
Block
F
Block
E
17466H-022
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