1. See “Switching Test Circuit” document on the Literature Download page of the Lattice web site. 2. This parame" />
參數(shù)資料
型號(hào): M4A3-96/48-55VC
廠商: Lattice Semiconductor Corporation
文件頁(yè)數(shù): 35/62頁(yè)
文件大?。?/td> 0K
描述: IC CPLD ISP 4A 96MC 100TQFP
標(biāo)準(zhǔn)包裝: 90
系列: ispMACH® 4A
可編程類(lèi)型: 系統(tǒng)內(nèi)可編程
最大延遲時(shí)間 tpd(1): 5.5ns
電壓電源 - 內(nèi)部: 3 V ~ 3.6 V
宏單元數(shù): 96
輸入/輸出數(shù): 48
工作溫度: 0°C ~ 70°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 100-LQFP
供應(yīng)商設(shè)備封裝: 100-TQFP(14x14)
包裝: 托盤(pán)
40
ispMACH 4A Family
Notes:
1. See “Switching Test Circuit” document on the Literature Download page of the Lattice web site.
2. This parameter does not apply to flip-flops in the emulated mode since the feedback path is required for emulation.
CAPACITANCE 1
Note:
1. These parameters are not 100% tested, but are calculated at initial characterization and at any time the design is modified where this parameter may be affected.
Frequency:
fMAXS
External feedback, D-type, Min of
1/(tWLS + tWHS) or 1/(tSS + tCOS)
143
133
125
118
95.2
87.0
74.1
60.6
MHz
External feedback, T-type, Min of 1/(tWLS
+ tWHS) or 1/(tSST + tCOS)
125
118
111
87.0
80.0
69.0
57.1
MHz
Internal feedback (fCNT), D-type, Min of
1/(tWLS + tWHS) or 1/(tSS + tCOSi)
182
167
160
154
125
118
95.0
74.1
MHz
Internal feedback (fCNT), T-type, Min of
1/(tWLS + tWHS) or 1/(tSST + tCOSi)
154
148
143
111
105
87.0
69.0
MHz
No feedback2, Min of 1/(tWLS + tWHS),
1/(tSS + tHS) or 1/(tSST + tHS)
250
200
154
125
100
83.3
MHz
fMAXA
External feedback, D-type, Min of 1/
(tWLA + tWHA) or 1/(tSA + tCOA)
111
108
100
83.3
66.7
55.6
43.5
MHz
External feedback, T-type, Min of 1/(tWLA
+ tWHA) or 1/(tSAT + tCOA)
105
102
95.2
76.9
62.5
52.6
41.7
MHz
Internal feedback (fCNTA), D-type, Min of
1/(tWLA + tWHA) or 1/(tSA + tCOAi)
133
125
105
83.3
66.7
50.0
MHz
Internal feedback (fCNTA), T-type, Min of
1/(tWLA + tWHA) or 1/(tSAT + tCOAi)
125
118
95.2
76.9
62.5
47.6
MHz
No feedback2, Min of 1/(tWLA + tWHA),
1/(tSA + tHA) or 1/(tSAT + tHA)
167
143
125
100
62.5
55.6
MHz
fMAXI
Maximum input register frequency, Min
of 1/(tWIRH + tWIRL) or 1/(tSIRS + tHIRS)
167
143
125
100
83.3
MHz
Parameter Symbol
Parameter Description
Test Conditions
Typ
Unit
CIN
Input capacitance
VIN=2.0 V
3.3 V or 5 V, 25°C, 1 MHz
6
pF
CI/O
Output capacitance
VOUT=2.0V
3.3 V or 5 V, 25°C, 1 MHz
8
pF
ispMACH 4A TIMING PARAMETERS OVER OPERATING RANGES1
-5
-55
-6
-65
-7
-10
-12
-14
Unit
Min Max Min Max Min Max Min Max Min Max Min Max Min Max Min Max
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