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參數資料
| 型號： | M58BF008B100D6T |
| 廠商： | 意法半導體 |
| 英文描述： | 8 Mbit 256Kb x32, Burst Flash Memory |
| 中文描述： | 8兆位的256Kb X32號，突發(fā)快閃記憶體 |
| 文件頁數： | 4/36頁 |
| 文件大?。?/td> | 231K |
| 代理商： | M58BF008B100D6T |
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M58BF008
4/36
A Command Interface decodes the Instructions
written to the memory to access or modify the
memory content, to toggle the enable/disable of
read access to the Overlay block, to toggle the
burst Wrap/No-wrap or to toggle the Synchronous
or Asynchronous Read mode. A Program/Erase
Controller (P/E.C.) executes the algorithms taking
care of the timings necessary for program and
erase operations. The P/E.C. also takes care of
verification to unburden the system microproces-
sor, while a Status Register tracks the status of
each operation.
The following Instructions are executed by the
memory in either Asynchronous or Synchronous
mode.
Access or modify memory content:
- Read Array
- Read or Clear Status Register
- Read Electronic Signature
- Erase Main memory block or Overlay block
- Program Main memory or Overlay memory
- Program Erase Suspend or Resume
Toggle:
– Asynchronous/Synchronous Read
– Overlay Block Read Enable/Disable
– Burst Wrap/No-wrap
The M58BF008 devices are offered in PQFP80
and LBGA80 1.0mm ball pitch packages.
Table 1. Signal Names
A0-A17
Address Inputs
DQ0-DQ31
Data Input/Output
CLK
System Clock
RP
Reset/Power-down
E
Chip Enable
G
Output Enable
GD
Output Disable
W
Write Enable
LBA
Load Burst Address
WR
Write/Read
BAA
Burst Address Advance
V
DD
Supply Voltage
V
DDQ
Supply Voltage for Input/Output
Buffers
V
PP
Program Supply Voltage
V
SS
Ground
V
SSQ
Input/Output Ground
NC
Not Connected Internally
DU
Don’t Use as Internally Connected
Table 2. Absolute Maximum Ratings
(1)
Note: 1. Stresses above those listed in the Table ”Absolute Maximum Ratings” may cause permanent damage to the device.
Symbol
Parameter
Value
Unit
T
A
Ambient Operating Temperature
–40 to 125
°
C
T
BIAS
Temperature Under Bias
–40 to 125
°
C
T
STG
Storage Temperature
–55 to 150
°
C
V
IO
Input Output Voltage
–0.6 to V
DDQ
+0.6
V
V
DD
, V
DDQ
Supply Voltage
–0.6 to 7
V
V
PP
Program Voltage
–0.6 to 13.5
V
When the V
PP
supply is at V
SS
this prevents pro-
gramming and erasure of the memory blocks and,
in addition, it prevents reading of the Overlay
block. When the V
PP
supply is at 5V it enables
both in-system program/erase and read access to
the Overlay block. For a limited time and number
of program/erase cycles the V
PP
supply may be
raised to 12V to provide fast program and erase
times.
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