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參數(shù)資料
| 型號： | M5LV-128/68-10VI |
| 廠商： | Lattice Semiconductor Corporation |
| 文件頁數(shù)： | 19/42頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CPLD 128MC 68I/O 100TQFP |
| 標準包裝： | 90 |
| 系列： | MACH® 5 |
| 可編程類型： | 系統(tǒng)內(nèi)可編程 |
| 最大延遲時間 tpd(1)： | 10.0ns |
| 電壓電源 - 內(nèi)部： | 3 V ~ 3.6 V |
| 宏單元數(shù)： | 128 |
| 輸入/輸出數(shù)： | 68 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-LQFP |
| 供應(yīng)商設(shè)備封裝： | 100-TQFP（14x14） |
| 包裝： | 托盤 |
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26
MACH 5 Family
1.
These parameters are not 100% tested, but are calculated at initial characterization and at any time the design is modified where these parameters may be affected.
ICC vs. FREQUENCY
These curves represent the typical power consumption for a particular device at system frequency. The
selected “typical” pattern is a 16-bit up-down counter. This pattern fills the device and exercises every
macrocell. Maximum frequency shown uses internal feedback and a D-type register. Power/Speed are
optimized to obtain the highest counter frequency and the lowest power. The highest frequency (LSBs) is
placed in common PAL blocks, which are set to high power. The lowest frequency signals (MSBs) are placed
in a common PAL block and set to lowest power. For a more detailed discussion about MACH 5 power
consumption, refer to the application note entitled MACH 5 Power in the Application Notes section on the
Lattice Data Book CD-ROM or Lattice web site.
ICC CURVES AT HIGH /LOW POWER MODES
CAPACITANCE1
Parameter Symbol
Parameter
Description
Test conditions
Typ
Unit
CIN
I/CLK pin
VIN =2.0 V
3.3 V or 5 V, 25 C, 1 MHz
12
pF
CI/O
I/O pin
VOUT =2.0 V
3.3 V or 5 V, 25 C, 1 MHz
10
pF
700
600
500
400
300
200
100
0
10
20
30
40
50
60
70
80
90
100
110
120
130
140
150
VCC = 5 V or 3.3 V, TA = 25 C
M5(LV)-512 high power
M5(LV)-384 high power
M5(LV)-320 high power
M5-256/1 and
M5LV-25 high power
M5-128/1 and M5LV-128 high power
M5(LV)-384 low power
M5(LV)-320 low power
M5-256/1 and M5LV-256 low power
M5-128/1 and M5LV-128 low power
I CC
(mA)
Frequency (MHz)
20446G-048
Figure 8. ICC Curves at High/Low Power Modes
M5-192/1 high power
M5-192/1 low power
M5(LV)-512 low power
Select
devices
have
been
discontinued.
See
Ordering
Information
section
for
product
status.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M5LV-256/104-10AC | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:Fifth Generation MACH Architecture |
| M5LV-256/104-10AI | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:Fifth Generation MACH Architecture |
| M5LV-256/104-10HC | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:Fifth Generation MACH Architecture |
| M5LV-256/104-10HI | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:Fifth Generation MACH Architecture |
| M5LV-256/104-10VC | 功能描述:CPLD - 復(fù)雜可編程邏輯器件 PROGRAM HI DENSITY CPLD RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
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