參數(shù)資料
型號: M5M5256DFP-70LLI#SM
元件分類: SRAM
英文描述: 32K X 8 STANDARD SRAM, 70 ns, PDSO28
封裝: 0.450 INCH, LEAD FREE, SOP-28
文件頁數(shù): 4/8頁
文件大小: 160K
代理商: M5M5256DFP-70LLI#SM
RENESAS LSIs
262144-BIT (32768-WORD BY 8-BIT) CMOS STATIC RAM
M5M5256DFP,VP-55LL,-70LL,-70LLI,
-55XL,-70XL
4
(1) READ CYCLE
(2) WRITE CYCLE
Symbol
Parameter
t
CR
t
a
(A)
Read cycle time
Address access time
Chip select access time
Output enable access time
Output disable time after /S high
Output disable time after /OE high
Output enable time after /S low
Output enable time after /OE low
Data valid time after address
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Limits
-70LL,-70LLI,
-70 XL
Min
70
t
a
(S)
t
a
(OE)
t
dis
(S)
t
dis
(OE)
t
en
(S)
t
en
(OE)
t
V
(A)
AC ELECTRICAL CHARACTERISTICS
( Vcc=5V±10%, unless otherwise noted )
Max
55
5
5
10
Min
55
55
30
20
20
Max
-55LL, 55XL
5
5
10
70
70
35
25
25
Symbol
Parameter
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Limits
Write cycle time
Write pulse width
Address setup time
Address setup time with respect to /W high
Chip select setup time
Data setup time
Data hold time
Write recovery time
Output disable time from /W low
Output disable time from /OE high
Output enable time from /W high
Output enable time from /OE low
Max
Min
70
50
-70LL,-70LLI,
-70 XL
-55LL, -55XL
Max
Min
55
40
t
CW
t
w
(W)
t
su
(A)
t
su
(A-WH)
t
su
(S)
t
su
(D)
t
h
(D)
t
rec
(W)
t
dis
(W)
t
dis
(OE)
t
en
(W)
t
en
(OE)
0
50
50
25
0
0
5
5
20
20
0
65
65
30
0
0
5
5
25
25
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