參數(shù)資料
型號: MAC7121MAG40
廠商: Freescale Semiconductor
文件頁數(shù): 48/56頁
文件大?。?/td> 0K
描述: IC MCU 32BIT FLASH 112-LQFP
標(biāo)準(zhǔn)包裝: 60
系列: MAC7xxx
核心處理器: ARM7
芯體尺寸: 32-位
速度: 40MHz
連通性: CAN,I²C,SCI,SPI
外圍設(shè)備: DMA,POR
輸入/輸出數(shù): 85
程序存儲器容量: 544KB(544K x 8)
程序存儲器類型: 閃存
RAM 容量: 32K x 8
電壓 - 電源 (Vcc/Vdd): 2.35 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x8/10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 125°C
封裝/外殼: 112-LQFP
包裝: 托盤
MAC7100 Microcontroller Family Hardware Specifications, Rev. 1.2
Preliminary
Mechanical Information
Freescale Semiconductor
52
v1.0
14-Sep-04
(continued)
A1a renamed to VDDX
A4 “rating” changed to Analog (from ATD)
A9 minimum changed to –0.3
A12 maximum value removed, footnote reference added
Table 8, Table 9 footnotes added regarding VDD5/VSS5
C1 renamed to VDDX
C4 added (C5 to C11b renumbered)
C8 maximum changed from 40 MHz to 50 MHz
Table 8 spec D4 updated (from TBD)
Table 9 spec E4 changed to 1
μA to match D4
— Reworked Equation 1 through Equation 4 and supporting text
Section 3.6.1 and Table 10 name changed from “Power Dissipation...”
— Added MAC71x1 designation and footnotes to Table 15 / Table 16
Table 15 designated for 40 MHz, and
– Numerous TBD entries replaced with values
– Run Supply Current collapsed from fifteen spec items to one
– Removed separate Core/Regulator/Pins specs for Run/Pseudo Stop/Stop modes
F1 and F3 descriptions changed
F1, F2, F3 and F4 values updated
Table 16 added for 50 MHz specifications
Table 17, deleted IREG spec (Regulator Current in Reduced Power, Shutdown Modes)
Table 18, VDD2.5 load capacitance typical changed, with clarification footnote
Table 19 updates
– Changed specs J1b and J6 maximum from 40 MHz to 50 MHz
– Reversed polarity of XCLKS reference in footnote (3)
J1b maximum changed to 40 MHz
–VDCBIAS removed
– Added footnote to define tfsys as 1 ÷ fSYS for use elsewhere in the document
Table 20 updates
– Changed spec K3 maximum from 40 MHz to 50 MHz
– Added footnote to define tfsys as 1 ÷ fSYS for use elsewhere in the document
Table 23 updates
–Removed VPORR and VPORA, as they duplicated H6
–Removed tWRS
Table 24 updates
M1 minimum changed from 25 ns to 20 ns (Figure 6 also updated)
– Reworded footnote (1)
– Added footnote (2) to define tCYC as 1 ÷ CLKOUT
Table 25 updates
– Added footnote (1)
– Consolidated previous NOTES into footnote (2), (Figure 7, Figure 8 also updated)
Revision History (continued)
Version No.
Release Date
Description of Changes
Page
Numbers
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