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參數(shù)資料
| 型號： | MAQ28151CXXXX |
| 廠商： | DYNEX SEMICONDUCTOR LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 1 CHANNEL(S), 64K bps, SERIAL COMM CONTROLLER, CDIP28 |
| 封裝： | CERAMIC, DIP-28 |
| 文件頁數(shù)： | 14/22頁 |
| 文件大?。?/td> | 220K |
| 代理商： | MAQ28151CXXXX |
MA28151
21/22
8. RADIATION TOLERANCE
Total Dose Radiation Testing
For product procured to guaranteed total dose radiation
levels, each wafer lot will be approved when all sample
devices from each lot pass the total dose radiation test.
The sample devices will be subjected to the total dose
radiation level (Cobalt-60 Source), defined by the ordering
code, and must continue to meet the electrical parameters
specified in the data sheet. Electrical tests, pre and post
irradiation, will be read and recorded.
Dynex Semiconductor can provide radiation testing
compliant with MIL-STD-883 Ionizing Radiation (Total Dose)
test 1019.
9. ORDERING INFORMATION
For details of reliability, QA/QC, test and assembly
options, see ‘Manufacturing Capability and Quality
Assurance Standards’ Section 9.
Unique Circuit Designator
S
R
Q
H
Radiation Hard Processing
100 kRads (Si) Guaranteed
300 kRads (Si) Guaranteed
1000 kRads (Si) Guaranteed
Radiation Tolerance
C
F
L
Ceramic DIL (Solder Seal)
Flatpack (Solder Seal)
Leadless Chip Carrier
Package Type
QA/QCI Process
(See Section 9 Part 4)
Test Process
(See Section 9 Part 3)
Assembly Process
(See Section 9 Part 2)
L
C
D
E
B
S
Rel 0
Rel 1
Rel 2
Rel 3/4/5/STACK
Class B
Class S
Reliability Level
MAx28151xxxxx
Total Dose (Function to specification)*
3x10
5 Rad(Si)
Transient Upset (Stored data loss)
5x10
10 Rad(Si)/sec
Transient Upset (Survivability)
>1x10
12 Rad(Si)/sec
Neutron Hardness (Function to specification)
>1x10
15 n/cm2
Single Event Upset**
<1x10
-10 Errors/bit day
Latch Up
Not possible
* Other total dose radiation levels available on request
** Worst case galactic cosmic ray upset - interplanetary/high altitude orbit
Figure 31: Radiation Hardness Parameters
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