參數(shù)資料
型號(hào)： MAX1221BETX+
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 13/44頁(yè)
文件大?。?/td> 0K
描述： IC ADC/DAC 12BIT W/FIFO 36TQFNEP
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 50
類型： ADC，DAC
分辨率（位）： 12 b
采樣率（每秒）： 225k
數(shù)據(jù)接口： MICROWIRE?，QSPI?，串行，SPI?
電壓電源： 模擬和數(shù)字
電源電壓： 2.7 V ~ 5.25 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 36-WFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 36-TQFN 裸露焊盤(pán)（6x6）
包裝： 管件
MAX1221/MAX1223/MAX1343
12-Bit, Multichannel ADCs/DACs with FIFO,
Temperature Sensing, and GPIO Ports
20
______________________________________________________________________________________
Table 1. Command Byte (MSB First)
REGISTER NAME
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Conversion
1
CHSEL3
CHSEL2
CHSEL1
CHSEL0
SCAN1
SCAN0
TEMP
Setup
0
1
CKSEL1
CKSEL0
REFSEL1
REFSEL0
DIFFSEL1
DIFFSEL0
ADC Averaging
0
1
AVGON
NAVG1
NAVG0
NSCAN1
NSCAN0
DAC Select
0
1
XXXX
Reset
0
1
RESET
SLOW
FBGON
GPIO Configure*
0
000011
GPIO Write*
0
000010
GPIO Read*
0
000001
No Operation
0
000000
X = Don’t care.
*
Only applicable on the MAX1221/MAX1343.
Power-Up Default State
The MAX1221/MAX1223/MAX1343 power up with all
blocks in shutdown (including the reference). All regis-
ters power up in state 00000000, except for the setup
register and the DAC input register. The setup register
powers up at 0010 1000 with CKSEL1 = 1 and REF-
SEL1 = 1. The DAC input register powers up to FFFh
when RES_SEL is high and powers up to 000h when
RES_SEL is low.
12-Bit ADC
The MAX1221/MAX1223/MAX1343 ADCs use a fully dif-
ferential successive-approximation register (SAR) con-
version technique and on-chip track-and-hold (T/H)
circuitry to convert temperature and voltage signals into
12-bit digital results. The analog inputs accept both sin-
gle-ended and differential input signals. Single-ended
signals are converted using a unipolar transfer function,
and differential signals are converted using a selec-
table bipolar or unipolar transfer function. See the
ADC
Transfer Functions section for more data.
ADC Clock Modes
When addressing the setup, register bits 5 and 4 of the
command byte (CKSEL1 and CKSEL0, respectively)
control the ADC clock modes. See Table 5. Choose
between four different clock modes for various ways to
start a conversion and determine whether the acquisi-
tions are internally or externally timed. Select clock
mode 00 to configure
CNVST/AIN_ to act as a conver-
sion start and use it to request internally timed conver-
sions, without tying up the serial bus. In clock mode 01,
use
CNVST to request conversions one channel at a
time, thereby controlling the sampling speed without
tying up the serial bus. Request and start internally
timed conversions through the serial interface by writ-
ing to the conversion register in the default clock mode,
10. Use clock mode 11 with SCLK up to 3.6MHz for
externally timed acquisitions to achieve sampling rates
up to 225ksps. Clock mode 11 disables scanning and
averaging. See Figures 6–9 for timing specifications on
how to begin a conversion.
These devices feature an active-low, end-of-conversion
output.
EOC goes low when the ADC completes the last
requested operation and is waiting for the next com-
mand byte.
EOC goes high when CS or CNVST go low.
EOC is always high in clock mode 11.
Single-Ended or Differential Conversions
The MAX1221/MAX1223/MAX1343 use a fully differen-
tial ADC for all conversions. When a pair of inputs are
connected as a differential pair, each input is connect-
ed to the ADC. When configured in single-ended mode,
the positive input is the single-ended channel and the
negative input is referred to AGND. See Figure 2.
In differential mode, the T/H samples the difference
between two analog inputs, eliminating common-mode
DC offsets and noise. IN+ and IN- are selected from the
following pairs: AIN0/AIN1, AIN2/AIN3, AIN4/AIN5,
AIN6/AIN7, AIN8/AIN9, AIN10/AIN11. AIN0–AIN7 are
available on all devices. AIN0–AIN11 are available on
the MAX1223. See Tables 5–8 for more details on con-
figuring the inputs. For the inputs that are configurable
as
CNVST, REF2, and an analog input, only one func-
tion can be used at a time.
Unipolar or Bipolar Conversions
Address the unipolar- and bipolar-mode registers
through the setup register (bits 1 and 0). See Table 5 for
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