參數(shù)資料
型號(hào)： MAX1221BETX+
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 26/44頁(yè)
文件大小： 0K
描述： IC ADC/DAC 12BIT W/FIFO 36TQFNEP
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 50
類型： ADC，DAC
分辨率（位）： 12 b
采樣率（每秒）： 225k
數(shù)據(jù)接口： MICROWIRE?，QSPI?，串行，SPI?
電壓電源： 模擬和數(shù)字
電源電壓： 2.7 V ~ 5.25 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 36-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 36-TQFN 裸露焊盤（6x6）
包裝： 管件
MAX1221/MAX1223/MAX1343
12-Bit, Multichannel ADCs/DACs with FIFO,
Temperature Sensing, and GPIO Ports
32
______________________________________________________________________________________
Table 18. DAC Power-Up and Power-Down Commands
CONTROL
BITS
DATA BITS
C3 C2 C1 C0
DAC7
DAC6
DAC5
DAC4
DAC3
DAC2
DAC1
DAC0
D3 D2 D1 D0
DESCRIPTION
FUNCTION
1
——— ————— 0
0
1
X
Power-Up
Power up individual DAC buffers indicated by data
in DAC0 through DAC3. A one indicates the DAC
output is connected and active. A zero does not
affect the DAC’s present state.
1
——— ————— 0
1
0
X
Power-Down 1
Power down individual DAC buffers indicated by
data in DAC0 through DAC3. A one indicates the
DAC output is disconnected and high impedance.
A zero does not affect the DAC’s present state.
1
——— ————— 1
0
X
Power-Down 2
Power down individual DAC buffers indicated by
data in DAC0 through DAC3. A one indicates the
DAC output is disconnected and pulled to AGND
with a 1k
Ω resistor. A zero does not affect the DAC’s
present state.
1
——— ————— 0
0
X
Power-Down 3
Power down individual DAC buffers indicated by
data in DAC0 through DAC3. A one indicates the
DAC output is disconnected and pulled to AGND
with a 100k
Ω resistor. A zero does not affect the
DAC’s present state.
1
——— ————— 1
1
X
Power-Down 4
Power down individual DAC buffers indicated by
data in DAC0 through DAC3. A one indicates the
DAC output is disconnected and pulled to REF1 with
a 100k
Ω resistor. A zero does not affect the DAC’s
present state.
Table 17. DAC Serial-Interface Configuration (continued)
16-BIT SERIAL WORD
MSB
LSB
CONTROL BITS
DATA BITS
C3 C2 C1 C0 D11 D10 D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
DESCRIPTION
FUNCTION
1
0
1
——
—————
DAC0–7
D11–D0 to input registers 0–7
(MAX1221/MAX1223). D11–D0 to
input registers 0–3 (MAX1343).
DAC outputs unchanged.
11
10
DAC
7
DAC
6
DAC
5
DAC
4
DAC
3
DAC
2
DAC
1
DAC
0
XXXX
DAC0–7
Input registers to DAC registers
indicated by ones, DAC outputs
updated, equivalent to software
LDAC. (No effect on DACs
indicated by zeros.) DAC7–DAC4
are only valid on the MAX1221/
MAX1223. These are don’t-care
bits for the MAX1343.
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