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參數(shù)資料
| 型號： | MAX19705ETM+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 21/37頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ANLG FRNT END 48-TQFN |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 43 |
| 位數(shù)： | 10 |
| 通道數(shù)： | 4 |
| 功率（瓦特）： | 28.2mW |
| 電壓 - 電源，模擬： | 2.7 V ~ 3.3 V |
| 電壓 - 電源，數(shù)字： | 1.8 V ~ 3.3 V |
| 封裝/外殼： | 48-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 48-TQFN-EP（7x7） |
| 包裝： | 管件 |
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MAX19705
10-Bit, 7.5Msps, Ultra-Low-Power
Analog Front-End
28
______________________________________________________________________________________
The conversion requires 12 clock edges (1 for input
sampling, 1 for each of the 10 bits, and 1 at the end for
loading into the serial output register) to complete one
conversion cycle (when no averaging is being done).
Each conversion of an average (when averaging is set
greater than 1) requires 12 clock edges. The conver-
sion clock is generated from the system clock input
(CLK). An SPI-programmable divider divides the sys-
tem clock by the appropriate divisor (set with bits AD7,
AD8, and AD9; see Table 15) and provides the conver-
sion clock to the auxiliary ADC. The auxiliary ADC has a
maximum conversion rate of 333ksps. The maximum
conversion clock frequency is 4MHz (333ksps x 12
clocks). Choose the proper divider value to keep the
conversion clock frequency under 4MHz, based upon
the system CLK frequency supplied to the MAX19705
(see Table 15). The total conversion time (tCONV) of the
auxiliary ADC can be calculated as tCONV = (12 x
NAVG x NDIV) / fCLK; where NAVG is the number of
averages (see Table 14), NDIV is the CLK divisor (see
Table 15), and fCLK is the system CLK frequency.
DOUT is normally in a tri-state condition. Upon setting
the auxiliary ADC start conversion bit (bit AD0), DOUT
becomes active and goes high, indicating that the aux-
ADC is busy. When the conversion cycle is complete
(including averaging), the data is placed into an output
register and DOUT goes low, indicating that the output
data is ready to be driven onto DOUT. When bit AD10 is
set (AD10 = 1), the aux-ADC enters a data output mode
where data is available on DOUT upon the next asser-
tion low of CS. The auxiliary ADC data is shifted out of
DOUT (MSB first) with the data transitioning on the
falling edge of the serial clock (SCLK). DOUT enters a
tri-state condition when CS is deasserted high. When bit
AD10 is cleared (AD10 = 0), the aux-ADC data is not
available on DOUT (see Table 16).
DIN can be written independent of DOUT state. A 16-
bit instruction at DIN updates the device configuration.
To prevent modifying internal registers while reading
data from DOUT, hold DIN at a high state. This effec-
tively writes all ones into address 1111. Since address
1111 does not exist, no internal registers are affected.
Table 14. Auxiliary ADC Averaging
Table 15. Auxiliary ADC Clock (CLK)
Divider
Table 16. Auxiliary ADC Data Output
Mode
AD10
SELECTION
0
Aux-ADC Data is Not Available on DOUT (Default)
1
Aux-ADC Enters Data Output Mode Where
Data is Available on DOUT
AD6
AD5
AD4
AUX-ADC AVERAGING
00
01 Conversion (No Averaging) (Default)
00
1
Average of 2 Conversions
01
0
Average of 4 Conversions
01
1
Average of 8 Conversions
10
0
Average of 16 Conversions
10
1
Average of 32 Conversions
11
X
Average of 32 Conversions
AD9
AD8
AD7
AUX-ADC CONVERSION CLOCK
00
0
CLK Divided by 1 (Default)
00
1
CLK Divided by 2
01
0
CLK Divided by 4
01
1
CLK Divided by 8
10
0
CLK Divided by 16
10
1
CLK Divided by 32
11
0
CLK Divided by 64
11
1
CLK Divided by 128
X = Don’t care.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX19705ETM+ | 功能描述:ADC / DAC多通道 7.5Msps CODEC/AFE 1.8/2.7-3.3V RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換速率: 分辨率:8 bit 接口類型:SPI 電壓參考: 電源電壓-最大:3.6 V 電源電壓-最小:2 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-40 |
| MAX19705ETM+GH7 | 功能描述:ADC / DAC多通道 10-Bit 7.5Msps Ultra-Low-Power Analog Front-End RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換速率: 分辨率:8 bit 接口類型:SPI 電壓參考: 電源電壓-最大:3.6 V 電源電壓-最小:2 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-40 |
| MAX19705ETM+T | 功能描述:ADC / DAC多通道 7.5Msps CODEC/AFE 1.8/2.7-3.3V RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換速率: 分辨率:8 bit 接口類型:SPI 電壓參考: 電源電壓-最大:3.6 V 電源電壓-最小:2 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-40 |
| MAX19705ETM+TGH7 | 功能描述:ADC / DAC多通道 10-bit 7.5Msps Ultra-Low-Power Analog Front-End RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換速率: 分辨率:8 bit 接口類型:SPI 電壓參考: 電源電壓-最大:3.6 V 電源電壓-最小:2 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-40 |
| MAX19705ETM-T | 功能描述:ADC / DAC多通道 RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換速率: 分辨率:8 bit 接口類型:SPI 電壓參考: 電源電壓-最大:3.6 V 電源電壓-最小:2 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-40 |
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