(VDD = 3V, OVDD " />
參數(shù)資料
型號： MAX19710ETN+T
廠商： Maxim Integrated Products
文件頁數(shù)： 37/37頁
文件大小： 0K
描述： IC ANLG FRNT END 56-TQFN
產(chǎn)品變化通告： Product Discontinuation 09/Jun/2011
標準包裝： 2,500
位數(shù)： 10
通道數(shù)： 2
功率（瓦特）： 30mW
電壓 - 電源，模擬： 3V
電壓 - 電源，數(shù)字： 3V
封裝/外殼： 56-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 56-TQFN-EP（7x7）
包裝： 帶卷 (TR)
MAX19710
ELECTRICAL CHARACTERISTICS (continued)
(VDD = 3V, OVDD = 1.8V, internal reference (1.024V), CL
≈ 10pF on all digital outputs, fCLK = 7.5MHz (50% duty cycle), Rx ADC input
amplitude = -0.5dBFS, Tx DAC output amplitude = 0dBFS, CM1 = 0, CM0 = 0, differential Rx ADC input, differential Tx DAC output,
CREFP = CREFN = CCOM = 0.33F, CL < 5pF on all aux-DAC outputs, TA = TMIN to TMAX, unless otherwise noted. Typical values are at
TA = +25°C.) (Note 1)
Note 1: Specifications from TA = +25°C to +85°C guaranteed by production tests. Specifications at TA < +25°C guaranteed by
design and characterization.
Note 2: Guaranteed by design and characterization.
Note 3: The minimum clock frequency (fCLK) for the MAX19710 is 1.5MHz (typ). The minimum aux-ADC sample rate clock frequency
(ACLK) is determined by fCLK and the chosen aux-ADC clock-divider value. The minimum aux-ADC ACLK > 1.5MHz / 128 =
11.7kHz. The aux-ADC conversion time does not include the time to clock the serial data out of DOUT. The maximum con-
version time (for no averaging, NAVG = 1) will be tCONV (max) = (12 x 1 x 128) / 1.5MHz = 1024s.
Note 4: SNR, SINAD, SFDR, HD3, and THD are based on a differential analog input voltage of -0.5dBFS referenced to the amplitude
of the digital outputs. SINAD and THD are calculated using HD2 through HD6.
Note 5: Crosstalk rejection is measured by applying a high-frequency test tone to one channel and a low-frequency tone to the sec-
ond channel. FFTs are performed on each channel. The parameter is specified as the power ratio of the first and second
channel FFT test tones.
Note 6: Amplitude and phase matching are measured by applying the same signal to each channel, and comparing the two output
signals using a sine-wave fit.
10-Bit, 7.5Msps, Full-Duplex
Analog Front-End
_______________________________________________________________________________________
9
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DIGITAL INPUTS (CLK, SCLK, DIN,
CS/WAKE, DA9–DA0)
Input High Threshold
VINH
0.7 x OVDD
V
Input Low Threshold
VINL
0.3 x OVDD
V
CLK, SCLK, DIN,
CS/WAKE = OGND or
OVDD
-1
+1
DA9–DA0 = OVDD
-1
+1
Input Leakage
DIIN
DA9–DA0 = OGND
-5
+5
A
Input Capacitance
DCIN
5pF
DIGITAL OUTPUTS (AD9–AD0, DOUT)
Output-Voltage Low
VOL
ISINK = 200A
0.2 x OVDD
V
Output-Voltage High
VOH
ISOURCE = 200A
0.8 x OVDD
V
Tri-State Leakage Current
ILEAK
-1
+1
A
Tri-State Output Capacitance
COUT
5pF
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參數(shù)描述
MAX19710EVCMODU+ 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 MAX19710 Eval System RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V
MAX19710EVKIT 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V
MAX19710EVKIT+ 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 MAX19710/13 Eval Kit RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V
MAX19711ETN 功能描述:ADC / DAC多通道 RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換速率: 分辨率:8 bit 接口類型:SPI 電壓參考: 電源電壓-最大:3.6 V 電源電壓-最小:2 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-40
MAX19711ETN+ 功能描述:ADC / DAC多通道 11Msps CODEC/AFE Full Duplex RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換速率: 分辨率:8 bit 接口類型:SPI 電壓參考: 電源電壓-最大:3.6 V 電源電壓-最小:2 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-40
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