參數(shù)資料
型號(hào): MAX2079CXE+T
廠商: Maxim Integrated Products
文件頁數(shù): 10/49頁
文件大?。?/td> 0K
描述: IC OCT ULTRASOUND RCVR 144CTBGA
標(biāo)準(zhǔn)包裝: 1,000
系列: *
Low-Power, High-Performance, Fully Integrated
Octal Ultrasound Receiver (Octal LNA, VGA,
AAF, ADC, and CWD Beamformer)
MAX2079
18
Maxim Integrated
Bump Description
BUMP
NAMe
FUNCTION
A1
IN1
Channel 1 Input. Connect to a 4.7nF coupling capacitor.
A2
ZF1
Channel 1 Active Impedance Matching Line. AC-couple to IN1 with a 2.2nF capacitor.
A3, L6, M6
VCC3
3.3V Power-Supply Voltage. Bypass to GND with a 0.1FF capacitor as close as possible to the part.
A4
CI+
8-Channel CW Positive In-Phase Output. Connect to 11V with a 120I external resistor.
A5
CQ+
8-Channel CW Positive Quadrature Output. Connect to 11V with a 120I external resistor.
A6
LO+
Positive CW Local Oscillator Input. This clock is then divided in the beamformer.
A7, B8,
L7, M7
AVDD
1.8V Analog ADC Power-Supply Voltage. Connect AVDD to a 1.7V to 1.9V power supply. Bypass
AVDD to GND with a 0.1FF capacitor as close as possible to the device.
A8
N.C.
No Connection. Internally not connected.
A9
REFIO
I/O Reference (for Internal Calibration)
A10
CWD
VGA/CW Mode Select. Set CWD low to enable the VGAs and disable the CW mixers. Set CWD high
to enable the CW mixers and disable the VGAs.
A11, C3–C10,
D3–D10,
E3–E10,
F4–F9,
G4–G9,
H3–H10,
J3–J10,
K3–K10,
L9, M9
GND
Ground
A12, F10,
G10, M12
OVDD
1.8V Digital ADC Power-Supply Voltage. Bypass OVDD to GND with a 0.1FF capacitor as close as
possible to the device.
B1
ZF2
Channel 2 Active Impedance Matching Line. AC-couple to IN2 with a 2.2nF capacitor.
B2
INC1
Channel 1 Clamp Input. Connect to the source side of the coupling capacitor.
B3, L3,
M3, M4
VCC5
4.75V Power-Supply Voltage. Bypass to GND with a 0.1FF capacitor as close as possible to the
device.
B4
CI-
8-Channel CW Negative In-Phase Output. Connect to 11V with a 120I external resistor.
B5
CQ-
8-Channel CW Negative Quadrature Output. Connect to 11V with a 120I external resistor.
B6
LO-
Negative CW Local Oscillator Input
B7
LOON
LO On Control Input. Turns LO on starting on the next rising or falling edge of LO.
B9
I.C.
Internally Connected. Leave unconnected.
B10
SHDN
Power-Down (Nap or Sleep Mode Programmable through Serial Interface)
B11
OUT1+
Channel 1 Positive LVDS Output
B12
OUT1-
Channel 1 Negative LVDS Output
C1
INC2
Channel 2 Clamp Input. Connect to the source side of the coupling capacitor.
C2
IN2
Channel 2 Input. Connect to a 4.7nF coupling capacitor.
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