Dual I2S Stereo Audio Codec 24 ____________" />
參數(shù)資料
型號: MAX9880AEWM+T
廠商: Maxim Integrated Products
文件頁數(shù): 17/70頁
文件大?。?/td> 0K
描述: IC CODEC AUDIO STEREO 48WLP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,500
類型: 立體聲音頻
數(shù)據(jù)接口: I²C,I²S,串行,SPI?
ADC / DAC 數(shù)量: 2 / 2
三角積分調(diào)變:
動態(tài)范圍,標準 ADC / DAC (db): 82 / 96
電壓 - 電源,模擬: 1.65 V ~ 1.95 V
電壓 - 電源,數(shù)字: 1.65 V ~ 1.95 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-WFBGA,WLCSP
供應(yīng)商設(shè)備封裝: 48-WLP(2.70x3.50)
包裝: 帶卷 (TR)
MAX9880A
Low-Power, High-Performance
Dual I2S Stereo Audio Codec
24
______________________________________________________________________________________
Pin Description
PIN
TQFN-EP
WLP
NAME
FUNCTION
1
B2
SDA/DIN
I2C Serial-Data Input/Output (MODE = 0). Connect a pullup resistor to DVDD for
full output swing. SPI compatible serial-data input (MODE = 1).
2
B3
SCL/SCLK
I2C Serial-Clock Input (MODE = 0). Connect a pullup resistor to DVDD for full
output swing. SPI-compatible serial clock input (MODE = 1).
3
A2
X1
Crystal Oscillator Input. Connect load capacitor and one terminal of the crystal
to this pin. Acceptable input frequency range: 10MHz to 30MHz.
4
A3
X2
Crystal Oscillator Output. Connect load capacitor and second terminal of the
crystal to this pin.
5
B4
CS
SPI-Compatible, Active-Low Chip-Select Input
6
B5
DOUT
SPI-Compatible Serial-Data Output
7
A5
MODE
I2C/SPI Mode Select Input (MODE = 0 for I2C mode, MODE = 1 for SPI mode)
8
A4
IRQ
Hardware Interrupt Output.
IRQ can be programmed to go low when bits in the
status register 0x00 are set. Read status register 0x00 to clear
IRQ once set.
Repeat faults have no effect on
IRQ until it is cleared by reading the I2C status
register 0x00. Connect a 10k
pullup resistor to DVDD for full output swing.
9
A6
AVDD
Analog Power Supply. Bypass to AGND with a 1F capacitor.
10
B6
REF
Converter Reference. Bypass to AGND with a 2.2F capacitor (1.23V nominal).
11, 14,
28, 33,
35, 48
C4, D4,
C5, D6
N.C.
No Connection. Connect to GND.
12
A7
PREG
Positive Internal Regulated Supply. Bypass to AGND with a 1F capacitor (1.6V
nominal).
13
C6
REG
PREG/2 Voltage Reference. Bypass to AGND with a 1F capacitor (0.8V
nominal)
15
A8
AGND
Analog Ground
16
B7
MICVDD
Microphone Bias Power Supply. Bypass to AGND with a 1F capacitor.
17
B8
MICBIAS
Low-Noise Microphone Bias. Connect a 2.2k
to 470
resistor to the positive
output of the microphone. Bypass to AGND with a 1F capacitor.
18
C7
MICLN/
DIGMICCLK
Left Negative Differential Microphone Input. AC-couple a microphone with a series
1F capacitor. Also digital microphone clock output. Selectable through I2C.
19
D7
MICLP/
DIGMICDATA
Left Positive Differential Microphone Input. AC-couple a microphone with a
series 1F capacitor. Also digital microphone data input. Selectable through
I2C.
20
C8
MICRP/
SPDMDATA
Right Positive Differential Microphone Input or SPDM Data Output. AC-couple a
microphone with a series 1F capacitor. Selectable through I2C.
21
D8
MICRN/
SPDMCLK
Right Negative Differential Microphone Input or SPDM Clock Output. AC-couple
a microphone with a series 1F capacitor. Selectable through I2C.
22
D5
JACKSNS/AUX
Jack Sense. Detects the presence or absence of a jack. See the Headset
Detection section. When used as an auxiliary ADC input, AUX is used to
measure DC voltages.
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