參數(shù)資料
型號(hào): MAX9967BRCCQ+D
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 3/30頁(yè)
文件大?。?/td> 0K
描述: IC DCL DUAL 500MBPS ATE 100TQFP
標(biāo)準(zhǔn)包裝: 90
系列: ATE
邏輯類型: 比較器, 驅(qū)動(dòng)器
電源電壓: -1.5 V ~ 6.5 V
位數(shù): 2
工作溫度: 0°C ~ 70°C
安裝類型: *
封裝/外殼: *
供應(yīng)商設(shè)備封裝: *
包裝: *
MAX9967
Dual, Low-Power, 500Mbps ATE
Driver/Comparator with 35mA Load
______________________________________________________________________________________
11
Typical Operating Characteristics
Note 19: Specified amplitude is programmed. Maximum data rate is specified in transitions per second. A square wave that reaches
at least 95% of its programmed amplitude may be generated at one-half this frequency.
Note 20: Crosstalk from either driver to the other. Aggressor channel is driving 3VP-P into a 50
load. Victim channel is in term mode
with VDTV_ = +1.5V.
Note 21: Indicative of switching speed from DHV_ or DLV_ to DTV_ and DTV_ to DHV_ or DLV_ when VDLV_ < VDTV_ < VDHV_. If
VDTV_ < VDLV_ or VDTV_ > VDHV_, switching speed is degraded by approximately a factor of 3.
Note 22: Change in offset voltage over the input range.
Note 23: Unless otherwise noted, all propagation delays are measured at 40MHz, VDUT_ = 0 to +2V, VCHV_ = VCLV_ = +1V, slew rate
= 2V/ns, ZS = 50
, driver in term mode with VDTV_ = 0. Comparator outputs are terminated with 50 to GND at scope input
with VCCO_ = 2V. Open-collector outputs are also terminated (internally or externally) with RTERM = 50
to VCCO_.
Measured from VDUT_ crossing calibrated CHV_/CLV_ threshold to crossing point of differential outputs.
Note 24: VDUT_= 0 to +1V, VCHV_ = VCLV _= +0.5V. At this pulse width, the output reaches at least 90% of its DC voltage swing.
The pulse width is measured at the crossing points of the differential outputs.
Note 25: Relative to propagation delay at VCHV_ = VCLV_ = +1.5V. VDUT_ = 200mVP-P. Overdrive = 100mV.
Note 26: Relative to segmented interpolations between 20mV, 200mV, 2V, and 3V.
Note 27: Measured from the crossing point of LDEN_ inputs to the 10% point of the output voltage change.
Note 28: VCOM_= 1.5V, Rs = 50
, driving voltage = +4V to -1V transition and -1V to +4V transition. Settling time is measured from
VDUT_ = 1.5V to ISINK/ISOURCE settling within specified tolerance.
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +9.75V, VEE = -5.25V, VCCO_ = +2.5V, SC1 = SC0 = 0, VCPHV_ = +7.2V, VCPLV_ = -2.2V, VLDH_ = VLDL_ = 0, VGS = 0,
TJ = +85
°C, unless otherwise noted. All temperature coefficients are measured at TJ = +70°C to +100°C, unless otherwise noted.) (Note 1)
DRIVER SMALL-SIGNAL RESPONSE
MAX9967
toc01
t (2.50ns/div)
V
DUT_
(50mV/div)
DLV_ = 0
RL = 50
DHV_ = 500mV
DHV_ = 200mV
0
DHV_ = 100mV
DRIVER LARGE-SIGNAL RESPONSE
MAX9967
toc02
t (2.50ns/div)
V
DUT_
(500mV/div)
DLV_ = 0
RL = 50
DHV_ = 5V
DHV_ = 3V
DHV_ = 1V
0
DRIVER TRAILING EDGE TIMING ERROR
vs. PULSE WIDTH
MAX9967
toc03
PULSE WIDTH (ns)
TIMING
ERROR
(ps)
20
15
10
5
-80
-60
-40
-20
0
20
40
-100
025
HIGH PULSE
LOW PULSE
NORMALIZED TO PW = 12.5ns
PERIOD = 25ns DHV_ = +3V DLV_ = 0
DHV_
90%
tDTF
DLV_
tDTR
DTV_
10%
Figure 1a. Drive to Term Rise and Fall Time
DTV_
DHV_
tTDR
DLV_
tTDF
90%
10%
Figure 1b. Term to Drive Rise and Fall Time
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