MAXQ2010
16-Bit Mixed-Signal Microcontroller
with LCD Interface
26
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The time base of the serial ports is derived from either a
division of the system clock or the dedicated baud-
clock generator. Table 1 summarizes the operating
characteristics of each mode.
I2C Bus
The microcontroller integrates an internal I2C bus mas-
ter/slave for communication with a wide variety of other
I2C-enabled peripherals. The I2C bus is a 2-wire bidi-
rectional bus using two bus lines, the serial data line
(SDA), and the serial clock line (SCL), as well as a
ground line. Both the SDA and SCL lines must be dri-
ven as open-collector/drain outputs. External resistors
are required as shown in Figure 3 to pull the lines to a
logic-high state.
The MAXQ2010 is flexible in that it supports both the
master and slave protocols. In the master mode, the
device has ownership of the I2C bus and drives the
clock and generates the START and STOP signals. This
allows it to send data to a slave or receive data from a
slave as required. In slave mode, the MAXQ2010 relies
on an externally generated clock to drive SCL and
responds to data and commands only when requested
by the I2C master device.
Serial Peripheral Interface (SPI)
The integrated SPI provides an independent serial
communication channel that communicates synchro-
nously with peripheral devices in a multiple master or
multiple slave system. The interface allows access to a
4-wire, full-duplex serial bus, and can be operated in
either master mode or slave mode. Collision detection
is provided when two or more masters attempt a data
transfer at the same time.
The maximum SPI master transfer rate is Sysclk/2.
When operating as an SPI slave, the MAXQ2010 can
support up to a Sysclk/4 SPI transfer rate. Data is trans-
ferred as an 8-bit or 16-bit value, MSB first. In addition,
the SPI module supports configuration of active SSEL
state through the slave-active select.
Real-Time Clock
A binary real-time clock (RTC) keeps the time of day in
absolute seconds with 1/256-second resolution. The
32-bit second counter can count up to approximately
136 years and be translated to calendar format by
application software. A time-of-day alarm and indepen-
dent subsecond alarm can cause an interrupt or wake
the device from stop mode.
The independent subsecond alarm runs from the same
RTC and allows the application to support interrupts
with a minimum interval of approximately 3.9ms. This
creates an additional timer that can be used to mea-
sure long periods of time without performance degra-
dation. Traditionally, long time periods have been
measured using multiple interrupts from shorter inter-
rupt intervals. Each timer interrupt required servicing,
with each accompanying interruption slowing system
operation. By using the RTC subsecond timer as a
long-period timer, only one interrupt is needed, elimi-
nating the performance hit associated with using a
shorter timer.
An internal crystal oscillator clocks the RTC using inte-
grated 6pF load capacitors, and yields the best perfor-
mance when mated with a 32.768kHz crystal rated for a
6pF load. No external load capacitors are required.
Higher accuracy can be obtained by supplying an
external clock source to the RTC.
Programmable Timers
The microcontroller incorporates three instances of the
16-bit programmable Timer/Counter B peripheral,
denoted TB0, TB1, and TB2. They can be used in
counter/timer/capture/compare/PWM functions, allow-
ing precise control of internal and external events.
These timer/counters support clock input prescaling
and set/reset/toggle PWM/output control functionality
not found on other MAXQ timer implementations. A new
register, TBC, supports certain PWM/output control
functions in some implementations. A distinguishing
characteristic of Timer/Counter B is that its count
MODE
TYPE
START BITS
DATA BITS
STOP BIT
Mode 0
Synchronous
—
8
—
Mode 1
Asynchronous
1
8
1
Mode 2
Asynchronous
1
8 + 1
1
Mode 3
Asynchronous
1
8 + 1
1
Table 1. Serial Port Operating Characteristics