參數(shù)資料
型號: MAXQ2010-KIT#
廠商: Maxim Integrated
文件頁數(shù): 5/34頁
文件大?。?/td> 0K
描述: EVALUATION KIT FOR MAX2010
標(biāo)準(zhǔn)包裝: 1
類型: 微控制器
已供物品: 板,線纜,CD,文檔,電源
MAXQ2010
16-Bit Mixed-Signal Microcontroller
with LCD Interface
______________________________________________________________________________________
13
I2C BUS CONTROLLER TIMING (ACTING AS I2C SLAVE)
(VDVDD = VAVDD = 2.7V to 3.6V, TA = -40°C to +85°C.) (Figure 4)
STANDARD MODE
FAST MODE
PARAMETER
SYMBOL
MIN
MAX
MIN
MAX
UNITS
System Frequency
fSYS
0.9
3.60
MHz
Operating Frequency
fI2C
fSYS/8
Hz
System Clock Period
tSYS
1/fI2C
μs
Hold Time After (Repeated)
START
tHD:STA
3tSYS
μs
Clock Low Period
tLOW_I2C
5tSYS
μs
Clock High Period
tHIGH_I2C
3tSYS
μs
Setup Time for Repeated START
tSU:STA
5tSYS
μs
Hold Time for Data
tHD:DAT
0
3.45
0
0.9
μs
Setup Time for Data
tSU:DAT
250
100
ns
SDA/SCL Fall Time
tF_I2C
300
20 + 0.1CB
300
ns
SDA/SCL Rise Time
tR_I2C
1000
20 + 0.1CB
300
ns
Setup Time for STOP
tSU:STO
3tSYS
μs
Bus-Free Time Between STOP
and START
tBUF
5tSYS
μs
Capacitive Load for Each Bus
Line
CB
400
pF
Noise Margin at the Low Level
for Each Connected Device
(Including Hysteresis)
VNL_I2C
0.1 x VDVDD
V
Noise Margin at the High Level
for Each Connected Device
(Including Hysteresis)
VNH_I2C
0.2 x VDVDD
V
SDA
SCL
SSR
P
S
tF_I2C
tR_I2C
tLOW
tHIGH
tHD:STA
tSU:DAT
tSU:STA
tSU:STO
tBUF
tHD:DAT
NOTE: TIMING REFERENCED TO VIH_I2C(MIN) AND VIL_I2C(MAX).
Figure 4. I2C Bus Controller Timing Diagram
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