
FUJITSU LIMITED
PRELIMINARY and CONFIDENTIAL
MB86293 CORAL_LQ
Graphics Controller
Specifications Rev. 1.1
218
ALF (Alpha Factor)
Register
address
Bit number
31 3029 28 2726 25 2423 2221 20 1918 17 1615 1413 12 1110 9 8 7 6 5 4 3 2 1 0
Bit field name
R/W
Initial value
DrawBaseAddress + 488
H
A
RW
0
This register sets the alpha blending coefficient.
BLP (Broken Line Pattern)
Register
address
Bit number
Bit field name
R/W
Initial value
DrawBaseAddress + 48C
H
31 3029 28 2726 25 2423 2221 20 1918 17 1615 1413 12 1110 9 8 7 6 5 4 3 2 1 0
BLP
RW
0
This register sets the broken-line pattern. The bit 1 set in the broken-line pattern is drawn in the foreground color
and bit 0 is drawn in the background color. The line pattern for 1 pixel line is laid out in the direction of MSB to
LSB and when it reaches LSB, it goes back to MSB. The BLPO register manages the bit numbers of the
broken-line pattern. 32 or 24 bits can be selected as the repetition of the broken-line pattern by the BP bit of the
MDR1 register. When 24 bits are selected, bits 23 to 0 of the BLP register are used.
TBC (Texture Border Color)
Register
address
Bit number
31 3029 28 2726 25 2423 2221 20 1918 17 1615 1413 12 1110 9 8 7 6 5 4 3 2 1 0
Bit field name
R/W
Initial value
DrawBaseAddress + 494
H
BC8/16
RW
0
This register sets the border color for texture mapping.
8 bit color mode:
Bit 7 to 0
BC8 (Border Color)
Sets the 8-bit direct color for the texture border color
16 bit color mode:
Bit 15 to 0
BC16 (Border Color)
Sets the 16-bit direct color for the texture border color
BLPO (Broken Line Pattern Offset)
Register
address
Bit number
31 3029 28 2726 25 2423 2221 20 1918 17 1615 1413 12 1110 9 8 7 6 5 4 3 2 1 0
Bit field name
R/W
Initial value
DrawBaseAddress + 3E0
H
BCR
RW
11111
This register stores the bit number of the broken-line pattern set to BLP registers, for broken line drawing. This
value is decremented at each pixel drawing. Broken line can be drawn starting from any starting position of the
specified broken-line pattern by setting any value at this register.
When no write is performed, the position of broken-line pattern is sustained.