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參數(shù)資料
| 型號： | MB86836PBT |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-bit Embedded Controller |
| 中文描述： | 32-BIT, 90 MHz, RISC MICROCONTROLLER, PBGA144 |
| 封裝： | 12 X 12 MM, PLASTIC, FBGA-144 |
| 文件頁數(shù)： | 63/82頁 |
| 文件大?。?/td> | 1373K |
| 代理商： | MB86836PBT |
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MB86830 Series
63
(2)Lock Control Register (LCR)
bit
→
31
ASI= 0x01, Address= 0x00000004
H
bit 31 to bit 2
bit 1
bit 0
:Reserved [“0”Write, Don’t care for read]
:Data Cache Entry Auto Lock (Enable
=
1, Disable
=
0, RST
=
0)
:Instruction Cache Entry Auto Lock (Enable
=
1, Disable
=
0, RST
=
0)
(3)Lock Control Save Register (LCSR)
bit
→
31
ASI
=
0x01, Address
=
0x00000008
H
bit 31 to bit 2
bit 1
bit 0
:Reserved [“0”Write, Don’t care for read]
:Previous Data Cache Auto Lock (Off
=
0, On
=
1, RST
=
0)
:Previous Instruction Cache Auto Lock (Off
=
0, On
=
1, RST
=
0)
(4)Restore Lock Control Register (RLCR)
bit
→
31
ASI
=
0x01, Address
=
0x00000010
H
bit 31 to bit 1
bit 0
:Reserved [“0”Write, Don’t care for read]
:Restore Lock Control Register (Restore
=
1, Ignore
=
0, RST
=
0)
(5)Bus Control Register (BCR)
bit
→
31
ASI
=
0x01, Address
=
0x00000020
H
bit 31 to bit 2
bit 1
bit 0
:Reserved [“0”Write, Don’t care for read]
:Data Burst Enable (Enable
=
1, Disable
=
0, RST
=
0)
:Instruction Burst Enable (Enable
=
1, Disable
=
0, RST
=
0)
(6)System Support Control Register (SSCR)
bit
→
31
ASI
=
0x01, Address
=
0x00000080
H
8
7
6
5
bit 31 to bit 8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1 to bit 0
:Reserved [“0”Write, Don’t care for read]
:DRAM Burst Enable (Enable
=
1, Disable
=
0, RST
=
0)
:DRAM Controller Enable (Enable
=
1, Disable
=
0, RST
=
0)
:Same Page Enable (Enable
=
1, Disable
=
0, RST
=
0)
:CS Enable (Enable
=
1, Disable
=
0, RST
=
0) *
:Programmable Wait-state (Enable
=
1, Disable
=
0, RST
=
1)
:Timer On/Off (Enable
=
1, Disable
=
0, RST
=
0)
:Reserved “0”Write, Don’t care for read]
*:CS0 is always enable.
2
1
0
Reserved
2
1
0
Reserved
1
0
Reserved
2
1
0
Reserved
4
3
2
1
0
Reserved
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MB86836PMT2 | 32-bit Embedded Controller |
| MB86941PFV | Peripheral LSI for SPARClite |
| MB86941 | Peripheral LSI for SPARClite |
| MB86942 | Peripheral LSI for SPARClite |
| MB86942PFV | Peripheral LSI for SPARClite |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB86836PMT2 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Embedded Controller |
| MB86930-30ZF-G-BND | 制造商:FUJITSU 功能描述: |
| MB86941 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:Peripheral LSI for SPARClite |
| MB86941PFV | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:Peripheral LSI for SPARClite |
| MB86942 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:Peripheral LSI for SPARClite |
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