參數(shù)資料
型號(hào)： MB86942PFV
廠商： FUJITSU LTD
元件分類(lèi)： 外設(shè)及接口
英文描述： Peripheral LSI for SPARClite
中文描述： MULTIFUNCTION PERIPHERAL, PQFP144
封裝： PLASTIC, QFP-144
文件頁(yè)數(shù)： 14/49頁(yè)
文件大?。?/td> 598K
代理商： MB86942PFV
14
MB86941/942
5. RCSTG SIGNALS (11)
Pin symbol
CS0#
CS1#
CS2#
CS3#
I/O
O
O
O
O
Pin no.
16
21
24
25
Pin name
Description
Expansion Chip Select 0
Expansion Chip Select 1
Expansion Chip Select 2
Expansion Chip Select 3
Expansion Chip Select output pin
When the input to the RCS# pin is “L,” one of these
chip select signals will be active depending on the
combination of input signals to the A0, A1 pins.
RE#
O
35
Expansion Read Enable
Expansion Read Enable output pin
When the input to the RCS# pin is “L” and a bus cycle
begins with an “H” input to the RD/WR# pin, this pin
produces a pulse of the designated width and the
designated timing.
Expansion Write Enable output pin
When the input to the RCS# pin is “L” and a bus cycle
begins with an “L” input to the RD/WR# pin, this pin
produces a pulse of the designated width and the
designated timing.
Expansion Data Strobe output pin
When a bus cycle begins with the RCS# pin input at
“L” level, this pin produces a pulse of the designated
width and the designated timing.
Resource Chip Select pin.
This pin is used to input the chip select signal supplied
to the module RCSTG.
When the module RCSTG is used to generate the
external resource chip select signals CS0# to CS3#,
read strobe RE#, write strobe WE#, and data strobe
DS#, the corresponding areas must be decoded.
This pin has internal pull-up resistance (MB86941
only).
These are the input pins for the address signal to the
module RCSTG.
When the module RCSTG is used to generate the
external resource chip select signals CS0# to CS3#,
read strobe signal RE#, write strobe signal WE#, and
data strobe signal DS#, this address input signal is
used to designate the byte position in the
corresponding area.
When the input to the RCS# pins is “L”’ level, the input
signal to these pins determines which of the external
resource chip select signals CS0# to CS3# goes
active.
These pins have internal pull-up resistance (MB86941
only).
This is the output pin for the ready signal generated by
the module RCSTG.
When the module RCSTG is used to generate the
external resource chip select signals CS0#-CS3#,
read strobe signal RE#, write strobe signal WE#, and
data strobe signal DS#, the ready signal is output from
these pins to the MPU.
When any of the signals CS0# to CS1# is at “L” level,
this signal is asserted with the designated timing
interval.
WE#
O
36
Expansion Write Enable
DS#
O
47
Expansion Data Strobe
RCS#
I
37
Resource Chip Select
A0
I
38
Address 0
A1
I
39
Address 1
RDYOUT#
O
49
Ready Out
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