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參數(shù)資料
| 型號(hào)： | MB86942PFV |
| 廠商： | FUJITSU LTD |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | Peripheral LSI for SPARClite |
| 中文描述： | MULTIFUNCTION PERIPHERAL, PQFP144 |
| 封裝： | PLASTIC, QFP-144 |
| 文件頁數(shù)： | 24/49頁 |
| 文件大?。?/td> | 598K |
| 代理商： | MB86942PFV |
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24
MB86941/942
(4) Interrupt signal
Interrupt input pulse width
(MB86941: V
DD
= 5 V
±
5%, T
A
= 0 to +70
°
C)
(MB86942: V
DD
= 3.3 V
±
0.15 V, T
A
= 0 to +70
°
C)
Value
Min.
t
IHW
6 t
CLK
+ 10
t
ILW
6 t
CLK
+ 10
t
CLK
: See “(2) Clock Signals.”
*1: When the trigger mode is set for “H” level signal input or RISE-EDGE, a pulse of at least this width is received
as a REQ-FF signal. Note that this rule does not guarantee that no interrupts less than this width will be received.
*2: When the trigger mode is set for “L” level signal input or FALL-EDGE, a pulse of at least this width is received
as a REQ-FF signal. Note that this rule does not guarantee that no interrupts less than this width will be received.
Parameter
Symbol
Unit
Max.
—
—
IRQ input “H” level pulse width*
1
IRQ input “L” level pulse width*
2
ns
ns
t
IHW
t
ILW
IRQx
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| MB86961APD-G | UNIVERSAL INTERFACE FOR 10BASET |
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| MB86950BPD-G | 制造商:FUJITSU 功能描述: |
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| MB86960APF-G | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:NETWORK INTERFACE CONTROLLER with ENCODER/DECODER (NICE) |
| MB86961A | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:UNIVERSAL INTERFACE FOR 10BASET |
| MB86961APD-G | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:UNIVERSAL INTERFACE FOR 10BASET |
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