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8.4 8/16-bit Timer/Counter Interrupt
8.4
8/16-bit Timer/Counter Interrupt
In the 8/16-bit timer/counter, interrupt conditions are satisfied (if interrupts are
enabled) when the counter matches the data register. This is true for both the interval
timer and counter functions.
s 8/16-bit Timer/Counter Interrupt
Table 8.4-1 "8/16-bit Timer/Counter Interrupt Control Bits and Interrupts" lists the 8/16-bit timer/
counter interrupts, interrupt request flags and IRQ output enable bits.
In 8-bit mode, 8/16-bit timer/counter interrupt requests are generated independently for Timer 1
and Timer 2. In 16-bit mode, the interrupt request is generated only for Timer 1, but basic
operation is the same. Interrupt operation will therefore be described only for Timer 1 in 8-bit
mode.
r 8-bit mode timer 1 interrupt operation
The counter counts up from "00H" clocked by the selected count clock. When the count in the
counter matches the value in the comparison data latch (corresponding to the value in timer
data register T1DR), the interrupt request flag bit is set to "1" (T1CR: T1IF).
At this time, an interrupt request (IRQ5) to the CPU is generated if the interrupt request enable
bit is enabled (T1CR: T1IF="1"). Write "0" to the TCEF bit in the interrupt processing routine to
clear the interrupt request.
The T1IF bit is set to "1" when the counter value matches the set value, regardless of the value
of the T1IE bit.
In 8 bit mode, although Timer 1 and Timer 2 operate independently of each other, they both
generate IRQ5. When processing IRQ5, then, the software may have to check the interrupt
request flag bits to determine which timer generated the interrupt.
Note:
The T1IF bit is not set if the counter is stopped (T1CR: T1STR = "0" at the same time as the
counter value matches the T1DR register.
An interrupt request is generated immediately if the T1IF bit is "1" when the T1IE bit is
changed from disabled to enabled ("0" --> "1").
Table 8.4-1 8/16-bit Timer/Counter Interrupt Control Bits and Interrupts
8-bit mode
16-bit mode
Timer 1
Timer 2
Timer 1+Timer2
Interrupt request flag bit
T1CR:T1IF
T2CR:T2IF
T1CR:T1IF
interrupt request enable bit
T1CR:T1IE
T2CR:T2IE
T1CR:T1IE
Interrupt source
8-bit counter
matches T1DR
8-bit counter
matches T2DR
16-bit counter matches
T1DR+T2DR