參數(shù)資料
型號： MB90234PFV-XXX
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP100
封裝： PLASTIC, LQFP-100
文件頁數(shù)： 41/83頁
文件大?。?/td> 1566K
代理商： MB90234PFV-XXX
MB90230 Series
46
12.Watchdog Timer and Timebase Timer
The watchdog timer consists of a 2-bit watchdog counter using carry signals from an 18-bit timebase counter
as the clock source, a control register, and a watchdog reset control section. The timebase timer consists of
an 18-bit timer and an interval interrupt control circuit.
(1) Register Configuration
(2) Block Diagram
TBTC
WTC
15
87
0
Timebase timer control register
0000A9H, A8H
Address:
bit
TBTC
TBC1
TBC0
TBR
TBIE
TBOF
Selector
AND
QR
S
Selector
Timebase
interrupt
WTC
WT1
WT0
WTE
PONR
STBR
WRST
ERST
SRST
From RST bit in STBYC register
RST pin
From hardware standby
control circuit
From power-on occurrence
WDGRST
To internal reset generator
2-bit counter
OF
CLR
Watchdog reset
generator
CLR
212
214
216
218
TBTRES
Clock input
Timebase timer
214
216
217
218
Oscillation clock
F
2 MC-16
bus
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