參數(shù)資料
型號: MB90234PFV-XXX
廠商: FUJITSU LTD
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP100
封裝: PLASTIC, LQFP-100
文件頁數(shù): 42/83頁
文件大?。?/td> 1566K
代理商: MB90234PFV-XXX
47
MB90230 Series
13. Delay Interruupt Generation Module
The delayed interrupt generation module is used to generate an interrupt for task switching. Using this module
allows an interrupt request to the F2MC-16F CPU to be generated or canceled by software.
(1) Register Configuration
(2) Block Diagram
14. Clock Output Control Register
The clock output control register outputs the output from the communication prescaler to the pin.
(1) Register Configuration
———
R0
15
14
13
12
11
10
9
8
Address: 00009FH
DIRR
Read/write
Initial value
Delayed interrupt source
generate/release register
(—)
(X)
(—)
(X)
(—)
(X)
(—)
(X)
(—)
(X)
(—)
(X)
(—)
(X)
(R/W)
(0)
bit
Interrupt source latch
Delayed interrupt source generate/release decoder
F
2 MC-16
bus
CKEN
FRQ1
FRQ0
15
14
13
12
11
10
9
8
Address: 00002EH
CLKR
Read/write
Initial value
Clock control register
(—)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
bit
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