參數(shù)資料
型號: MB90234PFV-XXX
廠商: FUJITSU LTD
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP100
封裝: PLASTIC, LQFP-100
文件頁數(shù): 45/83頁
文件大?。?/td> 1566K
代理商: MB90234PFV-XXX
5
MB90230 Series
s PIN DESCRIPTION
(Continued)
Pin no.
Pin name
Circuit
type
Function
80
X0
A
Oscillator pins
81
X1
82
VCC
Power supply pin
83 to 90
P00 to P07
G
General-purpose I/O port
An input pull-up resistor can be added to the port by setting the
pull-up resistor setting register.
These pins serve as D00 to D07 pins in bus modes other than the
single-chip mode.
D00 to D07
I/O pins for the lower eight bits of the external data bus.
These pins are enabled in an external-bus enabled mode.
91 to 98
P10 to P17
G
General-purpose I/O port
An input pull-up resistor can be added to the port by setting the pull-up
resistor setting register.
These pins are enabled in the single-chip mode with the external-bus
enabled and the 8-bit data bus specified.
D08 to D15
I/O pins for the upper eight bits of the external data bus
These pins are enabled in an external-bus enabled mode with the 16-
bit data bus specified.
99, 100
1 to 6
P20 to P27
G
General-purpose I/O port
An input pull-up resistor can be added to the port by setting the
pull-up resistor setting register.
These pins are enabled in the single-chip mode.
A00 to A07
I/O pins for the lower eight bits of the external data bus
These pins are enabled in an external-bus enabled mode.
7, 8
P30, P31
E
General-purpose I/O port
This port is enabled in the single-chip mode or when the middle
address control register setting is “port.”
A08, A09
I/O pins for the middle eight bits of the external data bus
These pins are enabled in an external-bus enabled mode when the
middle address control register setting is “address.”
9VSS
Power supply pin
10 to 15
P32 to P37
E
General-purpose I/O port
This port is enabled in the single-chip mode or when the middle
address control register setting is “port.”
A10 to A15
I/O pins for the middle eight bits of the external data bus
These pins are enabled in an external-bus enabled mode when the
middle address control register setting is “address.”
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