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| 型號(hào)： | MB90242A |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, 32 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | 12 X 12 MM, 0.50 MM PITCH, PLASTIC, SQFP-80 |
| 文件頁(yè)數(shù)： | 245/258頁(yè) |
| 文件大小： | 2010K |
| 代理商： | MB90242A |
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2.4 IIR Filter DSP Unit
82
Chapter 2: Hardware Configuration
The initial values for this bit are indeterminate. Define it before operation.
Nothing can be written to this bit while the DSP unit is executing operation (BF=1).
Table 2.4.1 Number-of-Products Settings (Bit N1,0/M1,0)
[Bit 7] RND (Rounding-off bit)
When this bit is set to 1, the calculation results are stored in 16-bit length integer format in the lower
16 bits (MDORL) of the sum-of-products output register (MDOR). In this case the data stored in the
upper bits of the MDOR register (bit 39 to bit 16) has no significance.
Also in this case, calculation data in integer format stored in the MDORL register is rounded up
(when 1; 0 is dropped), with the DIV bit set for rounding in the direction of positive infinity, in order
to prevent loss of computational accuracy. This represents binary processing similar to the normal
rounding of values in decimal format.
When this bit is set to 0, rounding-up will not be applied. Also, calculation results will be stored in
the MDOR register, in 16-bit length integer format if CLP=1, and in 35-bit length integer format if
CLP=0.
The initial value of this bit is undefined. It must always be set prior to calculation.
This bit cannot be written to while the DSP unit is executing calculations (when the BF bit=1).
[Bit 6] CLP (Clipping bit)
When this bit is set to 1, the results of calculation are stored in 16-bit integer format in the lower 16-
bits (MDORL) of the sum-of-products output register (MDOR). In this case the data stored in the
upper bits of the MDOR register (bit 39 to bit 16) has no significance.
Also in this case, any overflow condition created in the calculation data in integer format contained
in the MDORL register will cause that data to be forcibly replaced by the maximum positive or neg-
ative value. Thus either saturation processing or clip processing will be performed on the results of
the calculation. The maximum positive value is 7FFFH, and the maximum negative value is 8000H.
When this bit is set to 0, clipping processing will not be applied. Also, calculation results will be
stored in the MDOR register, in 16-bit length integer format if RND=1, and in 35-bit length integer
format if RND=0.
The initial value of this bit is undefined. It must always be set prior to calculation.
This bit cannot be written to while the DSP unit is executing calculations (when the BF bit=1).
[Bit 5] DIV (Divide bit)
This bit indicates the position at which rounding or clipping are applied to calculation results.
When CLP=1 or RND=1, this bit can be set to 1 to round or clip the LSB value to 12 bits. When this
bit is set to 0, the LSB will be rounded or clipped to 10 bits. (When rounded to 10 bits, data having a
'1' in the 10th bit only (hex value 0200H) will be added to the calculation results.)
The initial value of this bit is undefined. It must always be set prior to calculation.
N1
Number of
products
0
1
N0
0
1
0
1
2
3
4
M1
Number of
products
0
1
M0
0
1
0
1
2
3
4
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