2.1 CPU
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Chapter 2: Hardware
s Software Interrupts
(1) Overview
In a software interrupt, the CPU reacts to the execution of a specific type of instruction, and transfers
control from the execution of the program that it has been executing to an interrupt processing program
defined by the user. Software interrupts are always initiated by execution of a software interrupt
instruction. When a software interrupt is generated, the CPU performs the following interrupt
processing.
The contents of the A, DPR, ADB, DTB, PCB, PC and PS registers in the CPU are saved to the
system stack.
The I flag in the PS register is set to ‘0’ to disable hardware interrupts.
The CPU branches to the corresponding interrupt vector.
Software interrupt requests are always initiated by the execution of the INT instruction, which is the
software interrupt source, and do not involve the use of interrupt requests flags or enable flags.
The INT instruction itself has no interrupt level. Therefore the ILM bit is not updated by the INT
instruction, and the I flag remains set to ‘0’ to retain interrupt request status.
(2) Configuration
All functions related to software interrupts are contained within the CPU. To use a software interrupt, it
is necessary to execute the corresponding instructions.
As shown in Table 2.1.12, interrupt vectors for both hardware interrupts and software interrupts share
the same space. For example, interrupt request number INT11 can be used for hardware interrupt #0,
and can also be used for software interrupt INT #11. Thus the same interrupt processing subroutine will
be called by both hardware interrupt #0 and software interrupt INT #11.
(3) Operation
When the CPU fetches a software interrupt instruction for execution, it activates the software interrupt
processing microcoding routine. In software interrupt processing microcoding, the 12 bytes of data
contained in memory in the A, DPR, ADB, DTB, PCB, PC and PS registers are saved in the area of
memory designated by the SSB and SSP registers, then the contents of the 3-byte interrupt vector is
read and loaded into the PC and PCB register, the I flag is set to ‘0’ and the S flag is set to ‘1’ and CPU
processing branches to the interrupt routine. The next instruction executed will then be the interrupt
processing program defined by the user.
Figure 2.1.27 shows the flow of interrupt processing from the generation of the software interrupt, until
no more interrupt requests remain in the interrupt request program.