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參數(shù)資料
| 型號： | MB90V495G |
| 廠商： | Fujitsu Limited |
| 英文描述： | 16-bit Proprietary Microcontroller |
| 中文描述： | 16位微控制器專有 |
| 文件頁數(shù)： | 21/78頁 |
| 文件大?。?/td> | 746K |
| 代理商： | MB90V495G |
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MB90895 Series
21
(Continued)
Initial values :
0 : Initial value of this bit is “0.”
1 : Initial value of this bit is “1.”
X : Initial value of this bit is undefined.
* : “Reserved area” should not be written anything. Result of reading from “Reserved area” is undefined.
Address
Register
abbreviation
Register
Read/
Write
Resource
Initial value
003C80
H
to
003CFF
H
003D00
H
003D01
H
003D02
H
003D03
H
003D04
H
003D05
H
003D06
H
003D07
H
003D08
H
003D09
H
003D0A
H
003D0B
H
003D0C
H
003D0D
H
(Reserved area) *
CSR
Control status register
R/W, R
CAN controller
0XXXX001
B
00XXX000
B
000XX000
B
LEIR
Last event display register
R/W
(Reserved area) *
RTEC
Send/receive error counter
R
CAN controller
00000000
B
00000000
B
11111111
B
X1111111
B
XXXXXXXX
B
BTR
Bit timing register
R/W
IDER
IDE register
R/W
(Reserved area) *
TRTRR
Send RTR register
R/W
00000000
B
(Reserved area) *
RFWTR
Remote frame receive wait register
R/W
CAN controller
XXXXXXXX
B
(Reserved area) *
003D0E
H
TIER
Send completion interrupt
permission register
R/W
CAN controller
00000000
B
003D0F
H
003D10
H
003D11
H
003D12
H
003D13
H
003D14
H
to
003D17
H
003D18
H
to
003D1B
H
003D1C
H
to
003DFF
H
003E00
H
to
003EFF
H
003FF0
H
to
003FFF
H
(Reserved area) *
AMSR
Acceptance mask selection register
R/W
CAN controller
XXXXXXXX
B
XXXXXXXX
B
(Reserved area) *
AMR0
Acceptance mask register 0
R/W
CAN controller
XXXXXXXX
B
to
XXXXXXXX
B
XXXXXXXX
B
to
XXXXXXXX
B
AMR1
Acceptance mask register 1
R/W
(Reserved area) *
(Reserved area) *
(Reserved area) *
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