- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄377930 > MB90V495G (Fujitsu Limited) 16-bit Proprietary Microcontroller PDF資料下載
參數(shù)資料
| 型號(hào)： | MB90V495G |
| 廠商： | Fujitsu Limited |
| 英文描述： | 16-bit Proprietary Microcontroller |
| 中文描述： | 16位微控制器專有 |
| 文件頁(yè)數(shù)： | 52/78頁(yè) |
| 文件大?。?/td> | 746K |
| 代理商： | MB90V495G |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)當(dāng)前第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)
MB90895 Series
52
CAN controller block diagram
TX
Set and clear reception
buffer and transmission buffer
Set reception
buffer
ID selection
CRC error
Reception
DLC
CRC generation circuit/
error check
Stuffing
error
Reception
shift register
Destuffing/stuffing
error check
Acceptance
filter
Reception
buffer
decision circuit
Reception buffer
RAM address
generation circuit
Reception buffer, transmission buffer,
reception DLC, transmission DLC, ID selection
Arbitration lost
Arbitration
check
Bit error
Bit error
check
ACK error
Acknowledgment
error check
Form error
Form error
check
Input
latch
Pin
BTR
PSC
TS1
TS2
RSJ
TOE
TS
RS
HALT
NIE
NT
NS1,0
CSR
RTEC
BVALR
TREQR
TCANR
TRTRR
RFWTR
TCR
TIER
RCR
RIER
RRTRR
ROVRR
AMSR
AMR0
AMR1
0
1
LEIR
IDR0 to 7
DLCR0 to 7
DTR0 to 7
RAM
RX
IDER
CPU
operation
clock
Prescaler
(dividing by 1 to 64)
Bit timing
generation circuit
Node status
transition interrupt
generation circuit
Node status
transition
interrupt signal
Bus
status
decision
circuit
Idle, interrupt, suspend,
transmit, receive, error,
and overload
Error
control
circuit
Transmission/
reception
sequence
Clear transmission
buffer
Transmission
buffer
decision circuit
Trans-
mission
buffer
Data
counter
Acceptance
filter control
circuit
Trans-
mission
DLC
Bit error, stuff error,
CRC error, frame
error, ACK error
Recep-
tion
DLC
ID
selection
Arbitration
lost
Error frame
generation
circuit
Overload
frame
generation
circuit
Output
driver
Pin
Transmission
buffer
Transmission
shift register
Transmission
DLC
CRC
generation
circuit
Stuffing
ACK
generation
circuit
Set and clear
transmission buffer
Transmission
completion interrupt
generation circuit
Set reception buffer
Trans-
mission
completion
interrupt
signal
Reception completion
interrupt generation
circuit
Reception
completion
interrupt
signal
Operation clock (TQ)
Sync segment
Time segment 1
Time segment 2
F
2
MC-16LX bus
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MB90F897PMT | 10-Bit Buffers/Drivers With 3-State Outputs 24-CDIP -55 to 125 |
| MB90F897S | 10-Bit Buffers/Drivers With 3-State Outputs 28-LCCC -55 to 125 |
| MB90F897SPMT | 10-Bit Buffers/Drivers With 3-State Outputs 24-CDIP -55 to 125 |
| MB90M405 | Octal Edge-Triggered D-type Flip-Flops With Clear 20-CFP -55 to 125 |
| MB90M407 | Octal Edge-Triggered D-type Flip-Flops With Clear 20-LCCC -55 to 125 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB-910 | 制造商:Circuit Test 功能描述:BREADBOARD WIRING KIT - 350 PCS |
| MB9100100 | 制造商:COM/DUO 功能描述:FAN 4-6WKS |
| MB9100-100 | 制造商:COM/DUO 功能描述:FAN 4-6WKS |
| MB91101 | 制造商:Panasonic Industrial Company 功能描述:IC |
| MB91101A | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit RISC Microcontroller |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。