參數(shù)資料
型號(hào): MB98A9113
廠商: Fujitsu Limited
英文描述: Low Power Static Random Access Memory Card(1M低功耗靜態(tài)存儲(chǔ)器)
中文描述: 低功耗靜態(tài)隨機(jī)存取記憶卡(1分低功耗靜態(tài)存儲(chǔ)器)
文件頁(yè)數(shù): 5/32頁(yè)
文件大?。?/td> 557K
代理商: MB98A9113
5
MB98A9083x
/
9093x/9103x/9113x
-20
I
PIN DESCRIPTIONS
I
PIN LOCATIONS
Symbol
A
0
to A
20
Pin Name
Input/Output
Input
Function
Address Input
Address Inputs, A
0
to A
20
.
Data Inputs/Outputs.
The data bus size (8-bit or 16-bit) selected
with CE
1
and CE
2
.
Active Low
– Lower byte (D
0
to D
7
) is selected for read/
write function of SRAM cards.
Active Low
– Upper byte (D
8
to D
15
) is selected for
read/write function of SRAM cards.
Active Low
– Attribute memory is selected for read/write
function of identification data of SRAM
cards. (N.C. or “FF” data or attribute data.)
Active Low
– Output enable for SRAM cards.
Active Low
– Write enable for SRAM cards.
These pins detect if the card has been
correctly inserted. Both pins are tied to GND
internally.
Write controller for SRAM cards
This pin outputs the Protect / Non Protect
status of “WP Switch”.
These pins indicate the battery condition of
the SRAM cards.
a) BVD1 = BVD2 = V
OH
–Battery voltage is a safe level.
b) BVD2 = V
OL
, BVD1 = V
OH
–Battery voltage is lower than 2.65 V.
Battery should be replaced.
c)BVD1 = BVD2 = V
OL
–Battery voltage is lower than 2.37 V, or
battery is not present.
Power Supply Voltage (+5.0 V
±
5%)
System Ground
D
0
to D
15
Data Input/Output
Input/Output
CE
1
Card Enable for Lower Byte
Input
CE
2
Card Enable for Upper Byte
Input
REG
Attribute Memory Select
Input
OE
Output Enable
Input
WE
Write Enable
Input
CD
1
, CD
2
Card Detect
Output
WP
Write Protect
Output
BVD1
Battery Voltage Detect 1
Output
BVD2
Battery Voltage Detect 2
Output
V
CC
GND
N.C.
Power Supply
Ground
No Connection
Back Side
34
68
1
35
Fig. 2 – BOTTOM VIEW (CONNECTOR SIDE)
Front Side
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