- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄377941 > MBM29DL640E90TN (FUJITSU LTD) 64 M (8 M X 8/4 M X 16) BIT Dual Operation PDF資料下載
參數(shù)資料
| 型號： | MBM29DL640E90TN |
| 廠商： | FUJITSU LTD |
| 元件分類： | DRAM |
| 英文描述： | 64 M (8 M X 8/4 M X 16) BIT Dual Operation |
| 中文描述： | 4M X 16 FLASH 3V PROM, 90 ns, PDSO48 |
| 封裝： | PLASTIC, TSOP1-48 |
| 文件頁數(shù)： | 28/71頁 |
| 文件大小： | 913K |
| 代理商： | MBM29DL640E90TN |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁當(dāng)前第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁
MBM29DL640E
80/90/12
28
I
COMMAND DEFINITIONS
Device operations are selected by writing specific address and data sequences into the command register. Some
commands require Bank Address (BA) input. When command sequences are input into a bank reading, the
commands have priority over the reading. Table 4 shows the valid register command sequences. Note that the
Erase Suspend (B0h) and Erase Resume (30h) commands are valid only while the Sector Erase operation is
in progress. Also the Program Suspend (B0h) and Program Resume (30h) commands are valid only while the
Program operation is in progress. Moreover, Read/Reset commands are functionally equivalent, resetting the
device to the read mode. Please note that commands are always written at DQ
7
to DQ
0
and DQ
15
to DQ
8
bits
are ignored.
Read/Reset Command
In order to return from Autoselect mode or Exceeded Timing Limits (DQ
5
=
1) to Read/Reset mode, the Read/
Reset operation is initiated by writing the Read/Reset command sequence into the command register. Micro-
processor read cycles retrieve array data from the memory. The device remains enabled for reads until the
command register contents are altered.
The device will automatically power-up in the Read/Reset state. In this case a command sequence is not required
in order to read data. Standard microprocessor read cycles will retrieve array data. This default value ensures
that no spurious alteration of the memory content occurs during the power transition. Refer to AC Read Char-
acteristics and Timing Diagram for the specific timing parameters.
Autoselect Command
Flash memories are intended for use in applications where the local CPU alters memory contents. Therefore,
manufacture and device codes must be accessible while the device resides in the target system. PROM pro-
grammers typically access the signature codes by raising A
9
to a higher voltage. However, multiplexing high
voltage onto the address lines is not generally desired system design practice.
The device contains an Autoselect command operation to supplement traditional PROM programming method-
ology. The operation is initiated by writing the Autoselect command sequence into the command register.
The Autoselect command sequence is initiated first by writing two unlock cycles. This is followed by a third write
cycle that contains the bank address (BA) and the Autoselect command. Then the manufacture and device
codes can be read from the bank, and actual data from the memory cell can be read from another bank. The
higher order address (A
21
, A
20
, A
19
) required for reading out the manufacture and device codes demands the
bank address (BA) set at the third write cycle.
Following the command write, in WORD mode, a read cycle from address (BA) 00h returns the manufacturer’s
code (Fujitsu
=
04h) . And a read cycle at address (BA) 01h outputs device code. When 227Eh was output, this
indicates that two additional codes, called Extended Device Codes will be required. Therefore the system may
continue reading out these Extended Device Codes at the address of (BA) 0Eh, as well as at (BA) 0Fh. Notice
that the above applies to WORD mode. The addresses and codes differ from those of BYTE mode. (Refer to
Table 5.1 and 5.2. )
The sector state (protection or unprotection) will be informed by address (BA) 02h for
×
16 ( (BA) 04h for
×
8) .
Scanning the sector group addresses (A
21
, A
20
, A
19
, A
18
, A
17
, A
16
, A
15
, A
14
, A
13
, and A
12
) while (A
6
, A
3
, A
2
, A
1
, A
0
)
=
(0, 0, 0, 1, 0) will produce a logical “1” at device output DQ
0
for a protected sector group. The programming
verification should be performed by verifying sector group protection on the protected sector. (See Tables 2 and 3.)
The manufacture and device codes can be read from the selected bank. To read the manufacture and device
codes and sector protection status from a non-selected bank, it is necessary to write the Read/Reset command
sequence into the register. Autoselect command should then be written into the bank to be read.
If the software (program code) for Autoselect command is stored in the Flash memory, the device and manu-
facture codes should be read from the other bank, which does not contain the software.
To terminate the operation, it is necessary to write the Read/Reset command sequence into the register. To
execute the Autoselect command during the operation, Read/Reset command sequence must be written before
the Autoselect command.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MBM29DL640E90TR | 64 M (8 M X 8/4 M X 16) BIT Dual Operation |
| MBM29DL64DF | FLASH MEMORY CMOS 64 M (8 M X 8/4 M X 16) BIT |
| MBM29DL64DF-70 | FLASH MEMORY CMOS 64 M (8 M X 8/4 M X 16) BIT |
| MBM29DL64DF70PBT | FLASH MEMORY CMOS 64 M (8 M X 8/4 M X 16) BIT |
| MBM29DL64DF70TN | FLASH MEMORY CMOS 64 M (8 M X 8/4 M X 16) BIT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MBM29DL640E90TN-LE1 | 制造商:Spansion 功能描述: |
| MBM29DL640E90TR | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:64 M (8 M X 8/4 M X 16) BIT Dual Operation |
| MBM29DL64DF | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:FLASH MEMORY CMOS 64 M (8 M X 8/4 M X 16) BIT |
| MBM29DL64DF-70 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:FLASH MEMORY CMOS 64 M (8 M X 8/4 M X 16) BIT |
| MBM29DL64DF70PBT | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:FLASH MEMORY CMOS 64 M (8 M X 8/4 M X 16) BIT |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。