參數(shù)資料
型號(hào): MBM29DL640E90TN
廠商: FUJITSU LTD
元件分類: DRAM
英文描述: 64 M (8 M X 8/4 M X 16) BIT Dual Operation
中文描述: 4M X 16 FLASH 3V PROM, 90 ns, PDSO48
封裝: PLASTIC, TSOP1-48
文件頁數(shù): 48/71頁
文件大?。?/td> 913K
代理商: MBM29DL640E90TN
MBM29DL640E
80/90/12
48
Address
Data
WE
OE
CE
3rd Bus Cycle
Data Polling
555h
PA
A0h
PD
DQ
7
D
OUT
PA
t
WC
t
AS
t
AH
t
WHWH1
t
CPH
t
CP
t
GHEL
t
DS
t
DH
t
WS
t
WH
Figure 7
Alternate CE Controlled Program Operation Timing Diagram
Notes : 1.
PA is address of the memory location to be programmed.
PD is data to be programmed at word address.
DQ
7
is the output of the complement of the data written to the device.
D
OUT
is the output of the data written to the device.
Figure indicates last two bus cycles out of four bus cycle sequence.
These waveforms are for the
×
16 mode. (The addresses differ from
×
8 mode.)
2.
3.
4.
5.
6.
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