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參數(shù)資料
| 型號： | MBM29LV400B-12 |
| 廠商： | Fujitsu Limited |
| 英文描述： | CMOS 4M (512K ×8/256K×16) Falsh Memory(512K ×8/256K×16位 單5V 電源電壓閃速存儲器) |
| 中文描述： | 的CMOS 4分（為512k × 8/256K × 16）Falsh存儲器（為512k × 8/256K × 16位單5V的電源電壓閃速存儲器） |
| 文件頁數(shù)： | 22/51頁 |
| 文件大?。?/td> | 498K |
| 代理商： | MBM29LV400B-12 |
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22
MBM29LV400T
-10/-12
/MBM29LV400B
-10/-12
DQ
6
is different from DQ
2
in that DQ
6
toggles only when the standard program or Erase, or Erase Suspend
Program operation is in progress. The behavior of these two status bits, along with that of DQ
7
, is summarized
as follows:
Notes:
1. These status flags apply when outputs are read from a sector that has been erase-suspended.
2. These status flags apply when outputs are read from the byte address of the non-erase suspended sector.
For example, DQ
2
and DQ
6
can be used together to determine the erase-suspend-read mode. (DQ
2
toggles
while DQ
6
does not.) See also Table 8 and Figure 17.
Furthermore, DQ
2
can also be used to determine which sector is being erased. When the devices are in the
erase mode, DQ
2
toggles if this bit is read from the erasing sector.
RY/BY
Ready/Busy
The MBM29LV400T/400B provide a RY/BY open-drain output pin as a way to indicate to the host system that
the Embedded Algorithms are either in progress or completed. If the output is low, the devices are busy with
either a program or erase operation. If the output is high, the devices are ready to accept any read/write or erase
operation. When the RY/BY pin is low, the devices will not accept any additional program or erase commands.
If the MBM29LV400T/400B are placed in an Erase Suspend mode, the RY/BY output will be high. Also, since
this is an open drain output, many RY/BY pins can be tied together in parallel with a pull up resistor to V
CC
.
During programming, the RY/BY pin is driven low after the rising edge of the fourth WE pulse. During an erase
operation, the RY/BY pin is driven low after the rising edge of the sixth WE pulse. The RY/BY pin will indicate a
busy condition during the RESET pulse. Refer to Figure 11 and 12 for a detailed timing diagram.
Since this is an open-drain output, several RY/BY pins can be tied together in parallel with a pull-up resistor to V
CC
.
Mode
DQ
7
DQ
6
DQ
2
Program
toggles
1
Erase
0
toggles
toggles
Erase Suspend Read
(Erase-Suspended Sector)
(Note 1)
1
1
toggles
Erase Suspend Program
toggles
1 (Note 2)
DQ
7
DQ
7
(Note 2)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MBM29LV400T-10 | CMOS 4M (512K ×8/256K×16) Falsh Memory(512K ×8/256K×16位 單5V 電源電壓閃速存儲器) |
| MBM29LV400T-12 | CMOS 4M (512K ×8/256K×16) Falsh Memory(512K ×8/256K×16位 單5V 電源電壓閃速存儲器) |
| MBM29LV400B-10 | CMOS 4M (512K ×8/256K×16) Falsh Memory(512K ×8/256K×16位 單5V 電源電壓閃速存儲器) |
| MBM29LV400B | CMOS 4M (512K ×8/256K×16) Falsh Memory(512K ×8/256K×16位 單5V 電源電壓閃速存儲器) |
| MBM29LV400T | CMOS 4M (512K ×8/256K×16) Falsh Memory(512K ×8/256K×16位 單5V 電源電壓閃速存儲器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MBM29LV400BC | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:4M (512K X 8/256K X 16) BIT |
| MBM29LV400BC-12 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:4M (512K X 8/256K X 16) BIT |
| MBM29LV400BC-12PBT | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:4M (512K X 8/256K X 16) BIT |
| MBM29LV400BC-12PCV | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:4M (512K X 8/256K X 16) BIT |
| MBM29LV400BC-12PF | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:4M (512K X 8/256K X 16) BIT |
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