參數(shù)資料
型號(hào)： MBM29LV652UE90PBT
廠商： FUJITSU LTD
元件分類： DRAM
英文描述： 64M (4M X 16) BIT
中文描述： 4M X 16 FLASH 3V PROM, 90 ns, PBGA63
封裝： PLASTIC, FBGA-63
文件頁(yè)數(shù)： 24/58頁(yè)
文件大?。?/td> 571K
代理商： MBM29LV652UE90PBT
MBM29LV652UE-
90/12
24
After entering the erase-suspend-read mode, the user can program the device by writing the appropriate
command sequence for Program. This program mode is known as the erase-suspend-program mode. Again,
programming in this mode is the same as programming in the regular Program mode except that the data must
be programmed to sectors that are not erase-suspended. Successively reading from the erase-suspended sector
while the devices are in the erase-suspend-program mode will cause DQ
2
to toggle. The end of the erase-
suspended Program operation is detected by the RY/BY output pin, Data polling of DQ
7
or by the Toggle Bit I
(DQ
6
) which is the same as the regular Program operation. Note that DQ
7
must be read from the Program address
while DQ
6
can be read from any address.
To resume the operation of Sector Erase, the Resume command (30h) should be written. Any further writes of
the Resume command at this point will be ignored. Another Erase Suspend command can be written after the
chip has resumed erasing.
Extended Command
(1) Fast Mode
MBM29LV652UE has Fast Mode function. This mode dispenses with the initial two unclock cycles required in
the standard program command sequence by writing Fast Mode command into the command register. In this
mode, the required bus cycle for programming is two cycles instead of four bus cycles in standard program
command. (Do not write erase command in this mode.) The read operation is also executed after exiting this
mode. To exit this mode, it is necessary to write Fast Mode Reset command into the command register. (Refer
to the Figure 24.) The V
CC
active current is required even CE = V
IH
during Fast Mode.
(2) Fast Programming
During Fast Mode, the programming can be executed with two bus cycles operation. The Embedded Program
Algorithm is executed by writing program set-up command (A0h) and data write cycles (PA/PD). (Refer to the
Figure 24.)
(3) Extended Sector Group Protection
In addition to normal sector group protection, the MBM29LV652UE has Extended Sector Group Protection as
extended function. This function enable to protect sector group by forcing V
ID
on RESET pin and write a command
sequence. Unlike conventional procedure, it is not necessary to force V
ID
and control timing for control pins. The
only RESET pin requires V
ID
for sector group protection in this mode. The extended sector group protection
requires V
ID
on RESET pin. With this condition, the operation is initiated by writing the set-up command (60h)
into the command register. Then, the sector group addresses pins (A
21
, A
20
, A
19
, A
18
, and A
17
) and (A
6
, A
1
, A
0
) =
(0, 1, 0) should be set to the sector group to be protected (recommend to set V
IL
for the other addresses pins),
and write extended sector group protection command (60h). A sector group is typically protected in 250
μ
s. To
verify programming of the protection circuitry, the sector group addresses pins (A
21
, A
20
, A
19
, A
18
, and A
17
) and
(A
6
, A
1
, A
0
) = (0, 1, 0) should be set and write a command (40h). Following the command write, a logical “1” at
device output DQ
0
will produce for protected sector in the read operation. If the output data is logical “0”, please
repeat to write extended sector group protection command (60h) again. To terminate the operation, it is necessary
to set RESET pin to V
IH
. (Refer to the Figures 16 and 25.)
(4) CFI (Common Flash Memory Interface)
The CFI (Common Flash Memory Interface) specification outlines device and host system software interrogation
handshake which allows specific vendor-specified software algorithms to be used for entire families of devices.
This allows device-independent, JEDEC ID-independent, and forward-and backward-compatible software
support for the specified flash device families. Refer to CFI specification in detail.
The operation is initiated by writing the query command (98h) into the command register. Following the command
write, a read cycle from specific address retrieves device information. Please note that output data of upper byte
(DQ
8
to DQ
15
) is “0” in word mode (16 bit) read. Refer to the CFI code table. To terminate operation, it is necessary
to write the read/reset command sequence into the register. (See Table 7.)
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