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參數(shù)資料
| 型號： | MBM29PDS322BE10PBT |
| 廠商： | FUJITSU LTD |
| 元件分類： | DRAM |
| 英文描述： | NEOZED TYPE,400V.10A |
| 中文描述： | 2M X 16 FLASH 1.8V PROM, 100 ns, PBGA63 |
| 封裝： | PLASTIC, FBGA-63 |
| 文件頁數(shù)： | 28/66頁 |
| 文件大小： | 694K |
| 代理商： | MBM29PDS322BE10PBT |
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MBM29PDS322TE/BE
10/11
28
Hidden ROM (Hi-ROM) Protect Command
There are two methods to protect the Hidden ROM area. One is to write the sector group protect setup com-
mand(60h), set the sector address in the Hidden ROM area and (A
6
, A
3
, A
2
,A
1
, A
0
) = (0,0,0,1,0), and write the
sector group protect command(60h) during the Hidden ROM mode. The same command sequence could be
used because, it is the same as the extension sector group protect in the past except that it is in the Hidden
ROM mode and it does not apply high voltage to RESET pin. Please refer to “Function Explanation Extended
Sector Group Protection” for details of extension sector group protect setting.
The other is to apply high voltage (V
ID
) to A
9
and OE, set the sector address in the Hidden ROM area and (A
6
,
A
3
, A
2
, A
1
, A
0
) = (0, 0, 0, 1, 0), and apply the write pulse during the Hidden ROM mode. To verify the protect
circuit, apply high voltage (V
ID
) to A
9
, specify (A
6
, A
3
, A
2
, A
1
, A
0
) = (0, 0, 0, 1, 0) and the sector address in the
Hidden ROM area, and read. When “1” appears on DQ
0
, the protect setting is completed. “0” will appear on DQ
0
if it is not protected. Please apply write pulse again. The same command sequence could be used for the above
method because other than the Hidden ROM mode, it is the same as the sector group protect previously
mentioned. Please refer to “Function Explanation Sector Group Protection” for details of the sector group protect
setting.
Other sector group will be effected if the address other than those for Hidden ROM area is selected for the sector
group address, so please be careful. Once it is protected, protection can not be cancelled, so please pay the
closest attention.
Write Operation Status
Detailed in Table 9 are all the status flags that can determine the status of the bank for the current mode operation.
The read operation from the bank which doesn’t operate Embedded Algorithm returns data of memory cells.
These bits offer a method for determining whether a Embedded Algorithm is completed properly. The information
on DQ
2
is address sensitive. This means that if an address from an erasing sector is consecutively read, then
the DQ
2
bit will toggle. However, DQ
2
will not toggle if an address from a non-erasing sector is consecutively
read. This allows users to determine which sectors are in erase and which are not.
The status flag is not output from bank (non-busy bank) which doesn’t execute Embedded Algorithm. For
example, there is bank (busy bank) which is now executing Embedded Algorithm. When the read sequence is
[1] <busy bank>, [2] <non-busy bank>, [3] <busy bank>, the DQ
6
is toggling in the case of [1] and [3]. In case
of [2], the data of memory cells are outputted. In the erase-suspend read mode with the same read sequence,
DQ
6
will not be toggled in the [1] and [3].
In the erase suspend read mode, DQ
2
is toggled in the [1] and [3]. In case of [2], the data of memory cell is
outputted.
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