參數(shù)資料
型號(hào): MC13211
廠商: 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述: ZigBee- Compliant Platform - 2.4 GHz Low Power Transceiver for the IEEE 802.15.4 Standard plus Microcontroller(ZigBee平臺(tái)- 為IEEE 802.15.4標(biāo)準(zhǔn)和微控制器設(shè)計(jì)的2.4 GHz低功率收發(fā)器)
中文描述: ZigBee兼容平臺(tái)- 2.4 GHz的低功耗收發(fā)器符合IEEE 802.15.4標(biāo)準(zhǔn)加微控制器(ZigBee的平臺(tái)-為IEEE 802.15.4無(wú)線標(biāo)準(zhǔn)和微控制器設(shè)計(jì)的2.4 GHz的低功率收發(fā)器)
文件頁(yè)數(shù): 32/70頁(yè)
文件大小: 802K
代理商: MC13211
MC13211/212/213/214 Technical Data, Rev. 0.0,
32
Freescale Semiconductor
— Inherent — Operands in internal registers
— Relative — 8-bit signed offset to branch destination
— Immediate — Operand in next object code byte(s)
— Direct — Operand in memory at 0x0000–0x00FF
— Extended — Operand anywhere in 64-Kbyte address space
— Indexed relative to H:X — Five submodes including auto increment
— Indexed relative to SP — Improves C efficiency dramatically
Memory-to-memory data move instructions with four address mode combinations
Overflow, half-carry, negative, zero, and carry condition codes support conditional branching on
the results of signed, unsigned, and binary-coded decimal (BCD) operations
Efficient bit manipulation instructions
Fast 8-bit by 8-bit multiply and 16-bit by 8-bit divide instructions
STOP and WAIT instructions to invoke low-power operating modes
5.5.2
Programmer’s Model and CPU Registers
Figure 18
shows the five CPU registers. CPU registers are not part of the memory map.
Figure 18. CPU Registers
SP
PC
CONDITION CODE REGISTER
CARRY
ZERO
NEGATIVE
INTERRUPT MASK
HALF-CARRY (FROM BIT 3)
TWO’S COMPLEMENT OVERFLOW
H
X
0
0
0
7
15
15
7
0
ACCUMULATOR
A
INDEX REGISTER (LOW)
INDEX REGISTER (HIGH)
STACK POINTER
8
7
PROGRAM COUNTER
16-BIT INDEX REGISTER H:X
CCR
C
V
1
1
H
I
N Z
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