參數(shù)資料
型號(hào): MC33298
廠商: 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述: Eight Output Switch with Serial Peripheral Interface I/O(帶SPI接口的八輸出開(kāi)關(guān))
中文描述: 8個(gè)串行外圍接口的I / O(帶的SPI接口的八輸出開(kāi)關(guān)輸出開(kāi)關(guān))
文件頁(yè)數(shù): 12/28頁(yè)
文件大?。?/td> 642K
代理商: MC33298
33298
12
Go to: www.freescale.com
Figure 7. Switching Time Test Circuit
Figure 8. Output Fault Unlatch Disable
Delay Test Circuit
Figure 9. Turn-On/Off Waveforms
Figure 10. Output Fault Unlatch Disable
Delay Waveforms
C
L
represents the total capacitance of the test fixture and probe.
CS
Output
C
L
33298
Under
Test
V
DD
= 5.0 V
V
PWR
= 14 V
R
L
= 26
CS
Output
C
L
= 20 pF
33298
Under
Test
V
DD
= 5.0 V
V
PWR
= 11 V
C
L
represents the total capacitance of the test fixture and probe.
I
L
= 2.0 A
(Output ON)
90%
50%
10%
50%
50%
t
dly(off)
t
dly(on)
CS
Output Voltage
Waveform 1
Output Voltage
Waveform 2
t
r(SI)
< 10 ns
< 10 ns
t
f(SI)
5.0 V
0
14 V
V
OL
V
OL
14 V
1. tdly(on) and tdly(off) are turn-on and turn-off propagation delay times.
2. Turn-off is an output programmed from an ON to an OFF state.
3. Turn-on is an output programmed from and OFF to an ON state.
90%
10%
50%
< 10 ns
< 10 ns
t
dly(OFF)
t
r(SI)
t
f(SI)
CS
Output Voltage
Waveform
Output Current
Waveform
5.0 V
0
V
off
= 11 V
I
O(CL)
V
ON
= 5.0 V
0
1. t
pdly(off)
is the output fault unlatch disable propagation delay time required to
correctly report an output fault after CS rises. It represents an output command-
ed ON while having an existing output short (over current) to supply.
2. The SFPD pin < 0.2 V
50%
50%
F
Freescale Semiconductor, Inc.
For More Information On This Product,
n
.
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