參數(shù)資料
型號(hào)： MC33888FB
廠商： 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述： Quad High Side and Octal Low Side Switch for Automotive Applications(4高端開(kāi)關(guān)及8低端開(kāi)關(guān)，用于自動(dòng)應(yīng)用)
中文描述： 四高側(cè)和汽車(chē)應(yīng)用八路低邊開(kāi)關(guān)（4高端開(kāi)關(guān)及8低端開(kāi)關(guān)，用于自動(dòng)應(yīng)用）
文件頁(yè)數(shù)： 14/18頁(yè)
文件大?。?/td> 711K
代理商： MC33888FB
MC33888FB
SPI Interface and Protocol Description
Quad High Side and Octal Low Side Switch for Automotive
14
X : don
’
t care
NA Not Applicable
SO Communication
(see TABLE 3)
When the CSB pin is pulled low, the output status register for each output is loaded into the output register and the fault data is
clocked out MSB (OD15) first, as the new message data is clocked into the SI pin.
OD15 reflects the state of the watchdog bit (D15) that was addressed during the prior SOCR communication. If the OD15 is logic
L, then the following three MSBs (OD14, OD13, OD12) will reflect the logic states of the IHS0, IHS1 and FSI pins respectively. If
the OD15 bit is logic H, then the following three bits will reflect the logic states of the IHS2, IHS3 and WAKE pins respectively. The
next twelve bits clocked out of SO following a low transition of the CSB pin will reflect the state of each output, with a logic H in any
of the bits indicating that the respective output experienced a fault condition prior to the CSB transition. Any bits clocked out of the
SO pin after the first sixteen will be representative of the initial message bits that were clocked into the SI pin since the CSB pin first
transitioned to a logic L; this feature is useful for daisy chaining devices as well as message verification.
Following a CSB transition L to H, the device determines if the message was of a valid length (a valid message length is one that is
a multiple of 16 bits) and if so, latches the data into the appropriate registers. At this time, the SO pin is tri-stated and the fault
status register is now able to accept new fault status information.
Table 3
SO OUTPUT BIT ASSIGNMENT
BIT
SIG
SO
MESSAGE
BIT
MESSAGE DISCRIPTION
MSB
OD15
Reflects the state of the Watchdog bit from the previously clocked in
message.
OD14
If OD15 is logic L, then this bit will reflect the state of the direct input IHS0. If
OD15 is logic H, then this bit will reflect the state of IHS2.
OD13
If OD15 is logic L, then this bit will reflect the state of the direct input IHS1. If
OD15 is logic H, then this bit will reflect the state of IHS3.
OD12
If OD15 is logic L, then this bit will reflect the state of the input FSI. If OD15 is
logic H, then this bit will reflect the state of the input WAKE.
OD11
Reports the absence or presence of a fault on LS11
OD10
Reports the absence or presence of a fault on LS10
OD9
Reports the absence or presence of a fault on LS9
OD8
Reports the absence or presence of a fault on LS8
OD7
Reports the absence or presence of a fault on LS7
OD6
Reports the absence or presence of a fault on LS6
OD5
Reports the absence or presence of a fault on LS5
OD4
Reports the absence or presence of a fault on LS4
OD3
Reports the absence or presence of a fault on HS3
OD2
Reports the absence or presence of a fault on HS2
OD1
Reports the absence or presence of a fault on HS1
LSB
OD0
Reports the absence or presence of a fault on HS0
F
Freescale Semiconductor, Inc.
For More Information On This Product,
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