參數(shù)資料
型號: MC33888FB
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: Quad High Side and Octal Low Side Switch for Automotive Applications(4高端開關(guān)及8低端開關(guān),用于自動應(yīng)用)
中文描述: 四高側(cè)和汽車應(yīng)用八路低邊開關(guān)(4高端開關(guān)及8低端開關(guān),用于自動應(yīng)用)
文件頁數(shù): 4/18頁
文件大?。?/td> 711K
代理商: MC33888FB
MC33888FB
PINS FUNCTION DESCRIPTION
Quad High Side and Octal Low Side Switch for Automotive
4
18
SO
The Serial Output pin is connected to the SPI Serial Data Input pin of the master
device or to the SI pin of the next device in a daisy chain. This output will remain tri-
stated unless the device is selected by a low CSB pin. The output signal generated
will have CMOS logic levels and the output data will transition on the rising edges of
SCLK. The serial output data provides fault information for each output and is
returned MSB first when the device is addressed. Fault bit assignments for return
data are as follows: OD11 through OD0 are output fault bits for outputs 11 through 0,
respectively.
19
CSB
The Chip Select Bar pin is connected to a chip select output of an LSI IC. This IC
controls which device is addressed by pulling the CSB pin of the desired device low,
enabling the SPI communication with the device, while other devices on the serial
link keep their serial outputs tri-stated. This input has an internal active pull-up and
requires CMOS logic levels.
64
RSTB
The Reset pin is used to initialize the device configuration and fault registers, as well
as place the device in a low current standby mode. This pin also starts the watchdog
timeout when transitioned from logic L to logic H.
This pin should not be allowed
to be at logic H until the VCC is in regulation. This input has an internal pas-
sive pull-down.
63
WAKE
This pin is a logic input that starts the device watchdog timeout when brought to a
logic H. This pin will have an internal clamp which will protect the pin from high volt-
ages when current is limited with an external resistor.
This input has a passive
internal pull-down.
2
WDIN
The Watchdog Input pin is a CMOS logic level input that is used to monitor system
operation. If the incoming watchdog signal does not transition within the normal
watchdog timeout range, then the device will operate in the failsafe mode.
This input
has an active internal pull-down.
17
VDD
SPI logic power supply.
3
FLTB
The Fault output is an open drain indication that goes active low when a fault mode
is detected by the device. Specific device fault indication is given via the SO pin.
1
FSI
The FailSafe Input pin level determines the state of the outputs after a watchdog
timeout occurs. This pin has an internal pull-up. If the FSI pin is left to float to a logic
H, then HS0 and HS2 will turn on when in the failsafe state. If the FSI pin is tied to
GND, then the watchdog circuit and failsafe operation will be disabled
, thus allow-
ing operation without a watchdog signal.
30,31,32
33,34,35
50,51,52
53,54,55
NC1
NC2
NC3
NC4
These pins are not connected to the die. Although the NCx pins can be tied
to any potential (or left to float), all pins sharing the same NCx designation
must be tied to the same potential because they are internally connected
together.
26, 27, 58, 59,
TAB
VPWRT
These pins are tied to the backside TAB
F
Freescale Semiconductor, Inc.
For More Information On This Product,
n
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