Chapter 1 Device Overview MC9S12XE-Family
MC9S12XE-Family Reference Manual , Rev. 1.21
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Freescale Semiconductor
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
The program Flash memory and the EEPROM are supplied by the bus clock and the oscillator clock. The
oscillator clock is used as a time base to derive the program and erase times for the NVM’s.
The CAN modules may be congured to have their clock sources derived either from the bus clock or
directly from the oscillator clock. This allows the user to select its clock based on the required jitter
performance.
In order to ensure the presence of the clock the MCU includes an on-chip clock monitor connected to the
output of the oscillator. The clock monitor can be congured to invoke the PLL self-clocking mode or to
generate a system reset if it is allowed to time out as a result of no oscillator clock being present.
In addition to the clock monitor, the MCU also provides a clock quality checker which performs a more
accurate check of the clock. The clock quality checker counts a predetermined number of clock edges
within a dened time window to insure that the clock is running. The checker can be invoked following
specic events such as on wake-up or clock monitor failure.
1.4
Modes of Operation
The MCU can operate in different modes associated with MCU resource mapping and bus interface
The MCU can operate in different power modes to facilitate power saving when full system performance
Some modules feature a software programmable option to freeze the module status whilst the background
For system integrity support separate system states are featured as explained in
1.4.4 System States.
1.4.1
Chip Conguration Summary
The MCU can operate in six different modes associated with resource conguration. The different modes,
the state of ROMCTL and EROMCTL signal on rising edge of RESET and the security state of the MCU
affect the following device characteristics:
External bus interface conguration
Flash in memory map, or not
Debug features enabled or disabled
The operating mode out of reset is determined by the states of the MODC, MODB, and MODA signals
during reset (see
Table 1-12). The MODC, MODB, and MODA bits in the MODE register show the current
operating mode and provide limited mode switching during operation. The states of the MODC, MODB,
and MODA signals are latched into these bits on the rising edge of RESET.
In normal expanded mode and in emulation modes the ROMON bit and the EROMON bit in the
MMCCTL1 register denes if the on chip ash memory is the memory map, or not. (See
Table 1-12.) For
a detailed explanation of the ROMON and EROMON bits refer to the MMC description.