參數(shù)資料
型號: MC56F8006VLF
廠商: Freescale Semiconductor
文件頁數(shù): 72/106頁
文件大小: 0K
描述: DSC 16K FLASH 32MHZ 48-LQFP
標準包裝: 250
系列: 56F8xxx
核心處理器: 56800E
芯體尺寸: 16-位
速度: 32MHz
連通性: I²C,LIN,SCI,SPI
外圍設備: LVD,POR,PWM,WDT
輸入/輸出數(shù): 40
程序存儲器容量: 16KB(8K x 16)
程序存儲器類型: 閃存
RAM 容量: 1K x 16
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 24x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 105°C
封裝/外殼: 48-LQFP
包裝: 托盤
產(chǎn)品目錄頁面: 734 (CN2011-ZH PDF)
配用: MC56F8006DEMO-ND - DEMO BOARD FOR MC56F8006
APMOTOR56F8000E-ND - KIT DEMO MOTOR CTRL SYSTEM
MC56F8006/MC56F8002 Digital Signal Controller, Rev. 4
Specifications
Freescale Semiconductor
68
8.17
HSCMP Specifications
8.18
Optimize Power Consumption
See Section 8.6, “Supply Current Characteristics,” for a list of IDD requirements for the 56F8006/56F8002. This section
provides additional detail that can be used to optimize power consumption for a given application.
1 Typical values assume V
DDA = 3.0 V, Temp = 25C, fADCK=1.0 MHz unless otherwise stated. Typical values are for
reference only and are not tested in production.
2 1 LSB = (V
REFH – VREFL)/2
N
3 Monotonicity and no-missing-codes guaranteed in 10-bit and 8-bit modes
4 Based on input pad leakage current. Refer to pad electricals.
Table 38. HSCMP Specifications
Parameter
Symbol
Min
Typ
Max
Unit
Supply voltage
VPWR
1.8
3.6
V
Supply current, high speed mode (EN=1,
PMODE=1, VDDA VLVI_trip)
IDDAHS
150
A
Supply current, low speed mode (EN=1,
PMODE=0)
IDDALS
10
A
Supply current, off mode (EN=0,)
IDDAOFF
100
nA
Analog input voltage
VAIN
VSSA – 0.01
VDDA + 0.01
V
Analog input offset voltage
VAIO
40
mV
Analog comparator hysteresis
VH
3.0
20.0
mV
Propagation Delay, high speed mode (EN=1,
PMODE=1), 2.4 V < VDDA < 3.6 V
tDHSN
1
1 Measured with an input waveform that switches 30 mV above and below the reference, to the CMPO output pin. V
DDA >
VLVI_WARNING => LVI_WARNING NOT ASSERTED.
70
140
ns
Propagation Delay, High Speed Mode (EN=1,
PMODE=1), 1.8 V < VDDA < 2.4 V
tDHSB
2
2 Measured with an input waveform that switches 30mV above and below the reference, to the CMPO output pin. V
DDA <
VLVI_WARNING => LVI_WARNING ASSERTED.
70
249
ns
Propagation Delay, Low Speed Mode (EN=1,
PMODE=0), 2.4 V < VDDA < 3.6 V
tAINIT
3
3 Measured with an input waveform that switches 30mV above and below the reference, to the CMPO output pin. V
DDA >
VLVI_WARNING => LVI_WARNING NOT ASSERTED.
400
600
ns
Propagation Delay, Low Speed Mode (EN=1,
PMODE=0), 1.8 V < VDDA < 2.4 V
tAINIT
4
4 Measured with an input waveform that switches 30mV above and below the reference, to the CMPO output pin. V
DDA <
VLVI_WARNING => LVI_WARNING ASSERTED.
400
600
ns
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