參數資料
型號: MC56F8013MFAE
廠商: Freescale Semiconductor
文件頁數: 20/126頁
文件大?。?/td> 0K
描述: IC DIGITAL SIGNAL CTLR 32-LQFP
標準包裝: 1,250
系列: 56F8xxx
核心處理器: 56800E
芯體尺寸: 16-位
速度: 32MHz
連通性: I²C,SCI,SPI
外圍設備: POR,PWM,WDT
輸入/輸出數: 26
程序存儲器容量: 16KB(8K x 16)
程序存儲器類型: 閃存
RAM 容量: 2K x 16
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數據轉換器: A/D 6x12b
振蕩器型: 內部
工作溫度: -40°C ~ 125°C
封裝/外殼: 32-LQFP
包裝: 托盤
56F8013/56F8011 Data Sheet, Rev. 12
116
Freescale Semiconductor
Figure 10-17 Equivalent Circuit for A/D Loading
10.16 Power Consumption
See Section 10.1 for a list of IDD requirements for the 56F8013/56F8011. This section provides additional
detail which can be used to optimize power consumption for a given application.
Power consumption is given by the following equation:
A, the internal [static component], is comprised of the DC bias currents for the oscillator, leakage currents,
PLL, and voltage references. These sources operate independently of processor state or operating
Total power =
A: internal [static component]
+B: internal [state-dependent component]
+C: internal [dynamic component]
+D: external [dynamic component]
+E: external [static]
125 Ohm
ESD Resistor
Equivalent Circuit for A/D Loading
channel mux
equiv resistance
100 Ohms
(V
REFHx -VREFLx) / 2
C1
S/H
S1
1
2
3
ADC Input
1.
Parasitic capacitance due to package, pin-to-pin and pin-to-package
base coupling; 1.8pF
2.
Parasitic capacitance due to the chip bond pad, ESD protection devices
and signal routing; 2.04pF
3.
8 pF noise damping capacitor
4.
C1 = 1.4 pF
5.
S1 and S2 switch phases are non-overlapping and operate at the ADC
clock frequency
S1
S2
C1
: Singled Ended Mode
2 X C1
: Differential Mode
S1
C1
: Singled Ended Mode
2 X C1
: Differential Mode
S1
S2
6.
Equivalent input impedance, when the input is selected =
ohm
Rate
Clock
ADC
125
100
12
10
4
.
1
)
(
1
+
×
Please see http://www.freescale.com for the most current mechanical drawing.
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