參數(shù)資料
型號: MC56F8013MFAE
廠商: Freescale Semiconductor
文件頁數(shù): 37/126頁
文件大?。?/td> 0K
描述: IC DIGITAL SIGNAL CTLR 32-LQFP
標(biāo)準(zhǔn)包裝: 1,250
系列: 56F8xxx
核心處理器: 56800E
芯體尺寸: 16-位
速度: 32MHz
連通性: I²C,SCI,SPI
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 26
程序存儲器容量: 16KB(8K x 16)
程序存儲器類型: 閃存
RAM 容量: 2K x 16
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 6x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 125°C
封裝/外殼: 32-LQFP
包裝: 托盤
56F8013/56F8011 Data Sheet, Rev. 12
18
Freescale Semiconductor
2.2 56F8013/56F8011 Signal Pins
After reset, each pin is configured for its primary function (listed first). Any alternate functionality must
be programmed.
Table 2-3 56F8013/56F8011 Signal and Package Information for the 32-Pin LQFP
Signal
Name
LQFP
Pin No.
Type
State During
Reset
Signal Description
VDD
26
Supply
I/O Power — This pin supplies 3.3V power to the chip I/O interface.
VSS
13
Supply
VSS — These pins provide ground for chip logic and I/O drivers.
VSS
27
VDDA
8
Supply
ADC Power — This pin supplies 3.3V power to the ADC modules. It
must be connected to a clean analog power supply.
VSSA
9
Supply
ADC Analog Ground — This pin supplies an analog ground to the
ADC modules.
VCAP
25
Supply
VCAP — Connect a 2.2 μF or greater bypass capacitor between this
pin and VSS_IO, which is required by the internal voltage regulator
for proper chip operation. See Section 10.2.1.
GPIOB6
(RXD)
(SDA1)
(CLKIN)
1
Input/
Output
Input
Input/
Output
Input
Input with
internal
pull-up
enabled
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
Receive Data — SCI receive data input.
Serial Data — This pin serves as the I2C serial data line.
Clock Input — This pin serves as an optional external clock input.
After reset, the default state is GPIOB6. The alternative peripheral
functionality is controlled via the SIM (See Section 6.3.8) and the
CLKMODE bit of the OCCS Oscillator Control Register.
1. This signal is also brought out on the GPIOB1 pin.
Return to Table 2-2
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